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Date:   Tue, 11 Dec 2018 08:53:39 -0600
From:   "Dr. Greg" <greg@enjellic.com>
To:     Josh Triplett <josh@joshtriplett.org>
Cc:     Sean Christopherson <sean.j.christopherson@intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        x86@kernel.org, Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        Andy Lutomirski <luto@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        "H. Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org,
        linux-sgx@vger.kernel.org, Andy Lutomirski <luto@amacapital.net>,
        Haitao Huang <haitao.huang@linux.intel.com>,
        Jethro Beekman <jethro@fortanix.com>
Subject: Re: [RFC PATCH v3 0/4] x86: Add exception fixup for SGX ENCLU
Message-ID: <20181211145339.GA7528@wind.enjellic.com>
Reply-To: "Dr. Greg" <greg@enjellic.com>
References: <20181210232141.5425-1-sean.j.christopherson@intel.com> <20181210232449.GA11843@localhost>
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On Mon, Dec 10, 2018 at 03:24:50PM -0800, Josh Triplett wrote:

Good morning to everyone, I hope the week is progressing well.

> On Mon, Dec 10, 2018 at 03:21:37PM -0800, Sean Christopherson wrote:
> > At that point I realized it's a hell of a lot easier to simply provide
> > an IOCTL via /dev/sgx that allows userspace to register a per-process
> > ENCLU exception handler.  At a high level, the basic idea is the same
> > as the vDSO approach: provide a hardcoded fixup handler for ENCLU and
> > attempt to fixup select unhandled exceptions that occurred in user code.

> So, on the one hand, this is *absolutely* much cleaner than the VDSO
> approach. On the other hand, this is global process state and has
> some of the same problems as a signal handler as a result.

Sean's architecture is very simple and straight forward and thus has a
lot going for it.

As Sean's approach indicates, by linking the exception handler to
current->mm, SGX is very much a per memory map concept.  The issue is
that there can be multiple enclaves loaded and excecuting in a
processes memory map, the problem is, execution and thus exception
handling, is very much at the per thread level.

Based on the responses to my previous e-mail in this thread, the
primary driver for addressing the exception handler issue is for
shared libraries to implement independent execution of enclaves.  So
the question for Sean becomes where the 'pull' to address this issue
is coming from, is it the Intel SDK/PSW folks?  If so it might be
helpful for them to weigh in on requirements and needs.

To be very frank, there are only 3-4 groups actually working at this
level; the Intel SDK/PSW team, Fortanix, us and probably Baidu.  Given
the complexity of the issues involved with a runtime, the Linux SGX
development community, whether it be application or library developers
are going to be building on top of runtimes maintained by groups such
as these.

If we boil issues down to the very basics, the setup of an exception
handler is going to have to be wrapped into whatever code is being
executed by a thread doing enclave entry for the runtime being used.
It thus may be useful to think about this as being the responsibility
of whatever loaded and initialized the enclave against which
ENCLU[EENTER] is being issued against.

To add an additional wrinkle to this, our runtime is already doing
what amounts to recursive enclave invocation.  We handle remote
attestation quote generation and verification almost completely inside
of enclaves.  This requires that we issue an OCALL in order to exit
the enclave being attested in order to load and execute the platform
certification and quoting enclaves.

So if Linux is going to deal with this correctly, without invoking any
global state, the issue will come down conceptually to registering a
per-thread/per-EENTER exception handler by whatever mechanism the
kernel chooses to provide.  Which means we need to be thinking about
the ramifications of OCALL's.

So whatever we do has to be simple, straight forward and flexible.  If
not the bike shedding will last until something other then SGX gets
invented... :-)

I hope the above reflections are useful.

Best wishes for a productive day.

Dr. Greg

As always,
Dr. G.W. Wettstein, Ph.D.   Enjellic Systems Development, LLC.
4206 N. 19th Ave.           Specializing in information infra-structure
Fargo, ND  58102            development.
PH: 701-281-1686
FAX: 701-281-3949           EMAIL: greg@enjellic.com
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 the chances are you are doing it wrong."
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