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[209.132.180.67]) by mx.google.com with ESMTP id t12si13576584plq.190.2018.12.11.18.25.10; Tue, 11 Dec 2018 18:25:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hOKLRXrG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726273AbeLLCYV (ORCPT + 99 others); Tue, 11 Dec 2018 21:24:21 -0500 Received: from mail.kernel.org ([198.145.29.99]:57792 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726211AbeLLCYV (ORCPT ); Tue, 11 Dec 2018 21:24:21 -0500 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7AD8421104 for ; Wed, 12 Dec 2018 02:24:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1544581459; bh=N9oti+uKGIZDIJxpvvhW9aydZJByc8/zLtw8FZdg18g=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=hOKLRXrGGLhIm0B349gftRbv9mv20nSxSZ9rSkrjzwDJSZTjMsMEX1N7tjW9rK3Dr GjymvlAUJnoeg0xYw/4mLr15oav5YXqHoff1YKrc41XosW9PA4I9obx1dwoCHzXH37 t/MSCkAbmUrveYXiI1QcKZaGvF70MceO9SZeTPU4= Received: by mail-wm1-f46.google.com with SMTP id f81so4244913wmd.4 for ; Tue, 11 Dec 2018 18:24:19 -0800 (PST) X-Gm-Message-State: AA+aEWY4U+RSW8yYANA8VJvZOjjinjuU8oHTLJ7abYnlfPvTakQGpV7c wiMQEYS49WYRNhuSmBKq2fm5kdmTkVEsMNtDqLv25Q== X-Received: by 2002:a7b:ce17:: with SMTP id m23mr4838081wmc.74.1544581457888; Tue, 11 Dec 2018 18:24:17 -0800 (PST) MIME-Version: 1.0 References: <20181212000354.31955-1-rick.p.edgecombe@intel.com> <20181212000354.31955-5-rick.p.edgecombe@intel.com> In-Reply-To: <20181212000354.31955-5-rick.p.edgecombe@intel.com> From: Andy Lutomirski Date: Tue, 11 Dec 2018 18:24:05 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 4/4] x86/vmalloc: Add TLB efficient x86 arch_vunmap To: Rick Edgecombe Cc: Andrew Morton , Andrew Lutomirski , Will Deacon , Linux-MM , LKML , Kernel Hardening , "Naveen N . Rao" , Anil S Keshavamurthy , "David S. Miller" , Masami Hiramatsu , Steven Rostedt , Ingo Molnar , Alexei Starovoitov , Daniel Borkmann , Jessica Yu , Nadav Amit , Network Development , Ard Biesheuvel , Jann Horn , Kristen Carlson Accardi , Dave Hansen , "Dock, Deneen T" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Dec 11, 2018 at 4:12 PM Rick Edgecombe wrote: > > This adds a more efficient x86 architecture specific implementation of > arch_vunmap, that can free any type of special permission memory with only 1 TLB > flush. > > In order to enable this, _set_pages_p and _set_pages_np are made non-static and > renamed set_pages_p_noflush and set_pages_np_noflush to better communicate > their different (non-flushing) behavior from the rest of the set_pages_* > functions. > > The method for doing this with only 1 TLB flush was suggested by Andy > Lutomirski. > > Suggested-by: Andy Lutomirski > Signed-off-by: Rick Edgecombe > --- > arch/x86/include/asm/set_memory.h | 2 + > arch/x86/mm/Makefile | 3 +- > arch/x86/mm/pageattr.c | 11 +++-- > arch/x86/mm/vmalloc.c | 71 +++++++++++++++++++++++++++++++ > 4 files changed, 80 insertions(+), 7 deletions(-) > create mode 100644 arch/x86/mm/vmalloc.c > > diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h > index 07a25753e85c..70ee81e8914b 100644 > --- a/arch/x86/include/asm/set_memory.h > +++ b/arch/x86/include/asm/set_memory.h > @@ -84,6 +84,8 @@ int set_pages_x(struct page *page, int numpages); > int set_pages_nx(struct page *page, int numpages); > int set_pages_ro(struct page *page, int numpages); > int set_pages_rw(struct page *page, int numpages); > +int set_pages_np_noflush(struct page *page, int numpages); > +int set_pages_p_noflush(struct page *page, int numpages); > > extern int kernel_set_to_readonly; > void set_kernel_text_rw(void); > diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile > index 4b101dd6e52f..189681f863a6 100644 > --- a/arch/x86/mm/Makefile > +++ b/arch/x86/mm/Makefile > @@ -13,7 +13,8 @@ CFLAGS_REMOVE_mem_encrypt_identity.o = -pg > endif > > obj-y := init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \ > - pat.o pgtable.o physaddr.o setup_nx.o tlb.o cpu_entry_area.o > + pat.o pgtable.o physaddr.o setup_nx.o tlb.o cpu_entry_area.o \ > + vmalloc.o > > # Make sure __phys_addr has no stackprotector > nostackp := $(call cc-option, -fno-stack-protector) > diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c > index db7a10082238..db0a4dfb5a7f 100644 > --- a/arch/x86/mm/pageattr.c > +++ b/arch/x86/mm/pageattr.c > @@ -2248,9 +2248,7 @@ int set_pages_rw(struct page *page, int numpages) > return set_memory_rw(addr, numpages); > } > > -#ifdef CONFIG_DEBUG_PAGEALLOC > - > -static int __set_pages_p(struct page *page, int numpages) > +int set_pages_p_noflush(struct page *page, int numpages) Maybe set_pages_rwp_noflush()? > diff --git a/arch/x86/mm/vmalloc.c b/arch/x86/mm/vmalloc.c > new file mode 100644 > index 000000000000..be9ea42c3dfe > --- /dev/null > +++ b/arch/x86/mm/vmalloc.c > @@ -0,0 +1,71 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * vmalloc.c: x86 arch version of vmalloc.c > + * > + * (C) Copyright 2018 Intel Corporation > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; version 2 > + * of the License. This paragraph may be redundant with the SPDX line. > + */ > + > +#include > +#include > +#include > + > +static void set_area_direct_np(struct vm_struct *area) > +{ > + int i; > + > + for (i = 0; i < area->nr_pages; i++) > + set_pages_np_noflush(area->pages[i], 1); > +} > + > +static void set_area_direct_prw(struct vm_struct *area) > +{ > + int i; > + > + for (i = 0; i < area->nr_pages; i++) > + set_pages_p_noflush(area->pages[i], 1); > +} > + > +void arch_vunmap(struct vm_struct *area, int deallocate_pages) > +{ > + int immediate = area->flags & VM_IMMEDIATE_UNMAP; > + int special = area->flags & VM_HAS_SPECIAL_PERMS; > + > + /* Unmap from vmalloc area */ > + remove_vm_area(area->addr); > + > + /* If no need to reset directmap perms, just check if need to flush */ > + if (!(deallocate_pages || special)) { > + if (immediate) > + vm_unmap_aliases(); > + return; > + } > + > + /* From here we need to make sure to reset the direct map perms */ > + > + /* > + * If the area being freed does not have any extra capabilities, we can > + * just reset the directmap to RW before freeing. > + */ > + if (!immediate) { > + set_area_direct_prw(area); > + vm_unmap_aliases(); > + return; > + } > + > + /* > + * If the vm being freed has security sensitive capabilities such as > + * executable we need to make sure there is no W window on the directmap > + * before removing the X in the TLB. So we set not present first so we > + * can flush without any other CPU picking up the mapping. Then we reset > + * RW+P without a flush, since NP prevented it from being cached by > + * other cpus. > + */ > + set_area_direct_np(area); > + vm_unmap_aliases(); > + set_area_direct_prw(area); Here you're using "immediate" as a proxy for "was executable". And it's barely faster to omit immediate -- it's the same number of flushes, and all you save is one pass over the direct map. Do we really need to support all these combinations? Even if we do support them, I think that "immediate" needs a better name.