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[209.132.180.67]) by mx.google.com with ESMTP id j61si14781497plb.232.2018.12.12.00.33.23; Wed, 12 Dec 2018 00:33:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2018-07-02 header.b=UDvGCFel; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726767AbeLLIcS (ORCPT + 99 others); Wed, 12 Dec 2018 03:32:18 -0500 Received: from aserp2130.oracle.com ([141.146.126.79]:34846 "EHLO aserp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726437AbeLLIcS (ORCPT ); Wed, 12 Dec 2018 03:32:18 -0500 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id wBC8O6qN026774; Wed, 12 Dec 2018 08:31:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=corp-2018-07-02; bh=jXK4V4XHXfEhwO+EvcGsnsmgMdReutd+SbHs7eW8u64=; b=UDvGCFelMSJC8+mzu1FKXeoTrlz8WjTFlVybLSeFhgQaIkdSANnIFKbEKJVcWwiYc4fz ohEll3ImKbvukj4zLhMh46ETAVCOYTjF0G1G4xhLrM5giZSjXZOqxF5eYt0UHvJg1Mji oxCrrBFYpITkVatIszUYtqZwN1gmiVSGCIk8295j0u4hCCJGlSef6UNsK1vCiaukquw3 ChkdFJcSRF7nj2T/V5lsXq2Xx7itdFpzV/zFi/sKiCPhZAkGs8wTNHCf2BwryjBdO7A6 WFDNgT/wrqDyO1rSBxLh3B8vpXYNTsgnGJipDSfMEdQAFtoGDWq+Nq0mjo+gH3yLO2Cw Og== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp2130.oracle.com with ESMTP id 2pawwp08h3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Dec 2018 08:31:49 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id wBC8ViF4021085 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Dec 2018 08:31:44 GMT Received: from abhmp0015.oracle.com (abhmp0015.oracle.com [141.146.116.21]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id wBC8ViaF015434; Wed, 12 Dec 2018 08:31:44 GMT Received: from kadam (/197.157.0.38) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 12 Dec 2018 00:31:43 -0800 Date: Wed, 12 Dec 2018 11:31:32 +0300 From: Dan Carpenter To: Jeremy Fertic Cc: Jonathan Cameron , devel@driverdev.osuosl.org, Lars-Peter Clausen , Michael Hennerich , linux-iio@vger.kernel.org, Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Peter Meerwald-Stadler , Hartmut Knaack Subject: Re: [PATCH 10/11] staging: iio: adt7316: change interpretation of write to dac update mode Message-ID: <20181212083132.GJ3116@kadam> References: <20181212005503.28054-1-jeremyfertic@gmail.com> <20181212005503.28054-11-jeremyfertic@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181212005503.28054-11-jeremyfertic@gmail.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9104 signatures=668679 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1812120075 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Dec 11, 2018 at 05:55:02PM -0700, Jeremy Fertic wrote: > Based on the output of adt7316_show_all_DAC_update_modes() and > adt7316_show_DAC_update_mode(), adt7316_store_DAC_update_mode() should > expect the user to enter an integer input from 0 to 3. The user input is > currently expected to account for the actual bit positions in the register. > For example, choosing option 3 would require a write of 0x30 (actually 48 > since it expects base 10). To address this inconsistency, create a shift > macro to be used in the valid input check as well as the calculation for > the register write. > > Signed-off-by: Jeremy Fertic > --- > I'm not sure if this patch is appropriate since it's making a user visible > change. I've included it since the driver is still in staging. We don't want to break user space, but I agree with you that applying this patch is probably the right thing. regards, dan carpenter