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[209.132.180.67]) by mx.google.com with ESMTP id z143si15905207pfc.97.2018.12.12.00.50.28; Wed, 12 Dec 2018 00:50:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726701AbeLLIsu (ORCPT + 99 others); Wed, 12 Dec 2018 03:48:50 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:58417 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726478AbeLLIst (ORCPT ); Wed, 12 Dec 2018 03:48:49 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id wBC8jw30031713; Wed, 12 Dec 2018 09:48:30 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2p83yddw2v-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 12 Dec 2018 09:48:30 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 22E5438; Wed, 12 Dec 2018 08:48:29 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E7136275D; Wed, 12 Dec 2018 08:48:28 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 12 Dec 2018 09:48:28 +0100 From: Fabrice Gasnier To: , , CC: , , , , , , , , Subject: [PATCH v2 2/3] mfd: syscon: Add optional clock support Date: Wed, 12 Dec 2018 09:48:14 +0100 Message-ID: <1544604495-4082-3-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1544604495-4082-1-git-send-email-fabrice.gasnier@st.com> References: <1544604495-4082-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG5NODE2.st.com (10.75.127.14) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-12-12_02:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some system control registers need to be clocked, so the registers can be accessed. Add an optional clock and attach it to regmap. Signed-off-by: Fabrice Gasnier --- drivers/mfd/syscon.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index b6d05cd..a0ba4ff 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -12,6 +12,7 @@ * (at your option) any later version. */ +#include #include #include #include @@ -45,6 +46,7 @@ struct syscon { static struct syscon *of_syscon_register(struct device_node *np) { + struct clk *clk; struct syscon *syscon; struct regmap *regmap; void __iomem *base; @@ -119,6 +121,18 @@ static struct syscon *of_syscon_register(struct device_node *np) goto err_regmap; } + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + /* clock is optional */ + if (ret != -ENOENT) + goto err_clk; + } else { + ret = regmap_mmio_attach_clk(regmap, clk); + if (ret) + goto err_attach; + } + syscon->regmap = regmap; syscon->np = np; @@ -128,6 +142,11 @@ static struct syscon *of_syscon_register(struct device_node *np) return syscon; +err_attach: + if (!IS_ERR(clk)) + clk_put(clk); +err_clk: + regmap_exit(regmap); err_regmap: iounmap(base); err_map: -- 1.9.1