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Subject: Re: [PATCH 1/2] dt-bindings: gpu: mali-midgard: Add resets property
To:     Rob Herring <robh@kernel.org>
Cc:     devicetree@vger.kernel.org, Kevin Hilman <khilman@baylibre.com>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        linux-amlogic@lists.infradead.org,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
References: <20181210132227.29262-1-narmstrong@baylibre.com>
 <20181210132227.29262-2-narmstrong@baylibre.com>
 <CAL_JsqK9nDaOOe3yjHAdaH92ds=_cudbq-wQee+YBPaCHEE-HQ@mail.gmail.com>
From:   Neil Armstrong <narmstrong@baylibre.com>
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Date:   Wed, 12 Dec 2018 10:48:26 +0100
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On 11/12/2018 17:58, Rob Herring wrote:
> On Mon, Dec 10, 2018 at 7:22 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> The Amlogic ARM Mali Midgard requires reset controls to power on and
>> software reset the GPU, adds these as optional in the bindings.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>>  Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
>> index 18a2cde2e5f3..24d83ec952f1 100644
>> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
>> @@ -37,6 +37,8 @@ Optional properties:
>>  - operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
>>    for details.
>>
>> +- resets : Phandle to the reset controls for the Mali Midgard device.
> 
> How many? Sounds like 1, but the dts has 2. There's also a similar
> patch for Allwinner[1]. I don't want to see a different number of
> resets and different names for each vendor. So first figure out how
> many resets the IP block has. You'll have to find someone with access
> to the TRM.

I can answer for Amlogic, they have a reset for the bus interface and the GPU IP itself.

You are asking something impossible ;-) We can assume it has a single reset interface,
but vendors can add more to reset some glue HW. So we will need some variant per-vendor,
sorry to annoy you !

Neil

> 
> Rob
> 
> [1] https://patchwork.ozlabs.org/patch/1003654/
>