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From:   David Laight <David.Laight@ACULAB.COM>
To:     'Aubrey Li' <aubrey.li@intel.com>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
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CC:     "ak@linux.intel.com" <ak@linux.intel.com>,
        "tim.c.chen@linux.intel.com" <tim.c.chen@linux.intel.com>,
        "dave.hansen@intel.com" <dave.hansen@intel.com>,
        "arjan@linux.intel.com" <arjan@linux.intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Aubrey Li <aubrey.li@linux.intel.com>
Subject: RE: [PATCH v4 1/2] x86/fpu: track AVX-512 usage of tasks
Thread-Topic: [PATCH v4 1/2] x86/fpu: track AVX-512 usage of tasks
Thread-Index: AQHUkSUo7xJBKZwc2k62yoB0IvRxl6V7UyiQ
Date:   Wed, 12 Dec 2018 16:55:17 +0000
Message-ID: <c87224bd48bc4296a38ae4852bf28071@AcuMS.aculab.com>
References: <20181211002448.3520-1-aubrey.li@intel.com>
In-Reply-To: <20181211002448.3520-1-aubrey.li@intel.com>
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From: Aubrey Li
> Sent: 11 December 2018 00:25
> 
> User space tools which do automated task placement need information
> about AVX-512 usage of tasks, because AVX-512 usage could cause core
> turbo frequency drop and impact the running task on the sibling CPU.
> 
> The XSAVE hardware structure has bits that indicate when valid state
> is present in registers unique to AVX-512 use.  Use these bits to
> indicate when AVX-512 has been in use and add per-task AVX-512 state
> tracking to context switch.

Isn't a thread likely to clear the AVX registers at the end of a function
that uses them.
In particular this removes the massive overhead on certain cpus of
switching between two AVX modes.
So it is actually unlikely that XSAVE will need to save them at all?

As I've also said before the registers are caller saved and since
systems calls are normal function calls the application code
would have to save them across a system call.
This allows the kernel to zero the registers on system call entry
again meaning that XSAVE won't normally have to save them.

	David

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