Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp431168imu; Wed, 12 Dec 2018 20:42:48 -0800 (PST) X-Google-Smtp-Source: AFSGD/Uh/lKzTITd1fLZHKNkImlYX/0leakIea4n2t/hfXpJ8w6xGOaiKtkjzWOy1KuMgYabcXG+ X-Received: by 2002:a62:db41:: with SMTP id f62mr23131486pfg.123.1544676168500; Wed, 12 Dec 2018 20:42:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544676168; cv=none; d=google.com; s=arc-20160816; b=vzvcMaJ4d2ImyYuqjLFF5kuOG2IDMaMERQtVV15n3nHLBzHdxt2ido/7209jSJIDbw L9HKPxGErxO0/6rh/GMkC8NLUW5w1PkxZ8Yj1o4tOdoYlDv1xhgJyYY9p9Bc4ZdkARZ1 CxWe24e2pvU11wXLbmq+Lxi74HLaqxf4VRZPA+P/o/HjFv1Sfbg45Q5VsCotDJFqUF0t zpzbAcrnKV7pHwGld+uozm8SW/6uvf/WWIqWeSLqzSk1TNDJMS+ppAmeGubA2Btvx/kW oAqRtAcVJ4jozmnJd8uaitlfXqOvxuiXMUch4QQjcoQrjk9WbsF53NLhjQwubrEr6Q6a +sog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=1BnpqdlAmLdk/K17/Lp4W0JbEIbHubB+f1irhz0pztk=; b=s5Njr4bcyqkzMZo7WXRW6pGy1vWUM60MXO53Ad+ZriUs/XPzxuD0mmbooHNE399o6s 0PXH6Sm8dO4wch64QFJ9RhYv1l/Rzg3LYHa8pqAZnqsBSwJT5X4wx5PrerFC/lauLMZr 5Ox6ALYjfksUrIWM1tbpZuzMSA4E73odg2qDgelXzrS5HNl+eLVwBGMRGJ5zoW+mj8R7 xgxs5XcA4N+ZAkTb+sggovJWU2HPGOjbiqxc64jB8RyAxJJTDT5T1okMkq8JBoSZKria 9C/KKnecvxfr9XrruvozIbSESs4uPPH8eBoYE7qvDSVrMUN9baTulTiGxQUVG1Y0/nPZ rycA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p11si642105pgb.219.2018.12.12.20.42.33; Wed, 12 Dec 2018 20:42:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729141AbeLMElp (ORCPT + 99 others); Wed, 12 Dec 2018 23:41:45 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:58396 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728683AbeLMElo (ORCPT ); Wed, 12 Dec 2018 23:41:44 -0500 Received: from [10.18.29.207] (10.18.29.207) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Thu, 13 Dec 2018 12:42:02 +0800 Subject: Re: [PATCH RESEND v7 1/4] clk: meson: add emmc sub clock phase delay driver To: Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Stephen Boyd , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Jian Hu , Qiufang Dai , Hanjie Lin , Victor Wan , , , , , References: <1544457877-51301-1-git-send-email-jianxin.pan@amlogic.com> <1544457877-51301-2-git-send-email-jianxin.pan@amlogic.com> <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com> From: Jianxin Pan Message-ID: <33721ac4-3564-1347-3b7b-2c795db63851@amlogic.com> Date: Thu, 13 Dec 2018 12:42:02 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.3.2 MIME-Version: 1.0 In-Reply-To: <8e1c711b477eeee60809f33926cf9c6a52f530cd.camel@baylibre.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.18.29.207] X-ClientProxiedBy: mail-sh2.amlogic.com (10.18.11.6) To mail-sh2.amlogic.com (10.18.11.6) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HI Jerome, On 2018/12/12 0:28, Jerome Brunet wrote: > On Tue, 2018-12-11 at 00:04 +0800, Jianxin Pan wrote: >> From: Yixun Lan >> [...] >> + >> +static inline struct meson_clk_phase_delay_data * >> +meson_clk_get_phase_delay_data(struct clk_regmap *clk) >> +{ >> + return clk->data; >> +} > > This is only usefull in the related clock driver, no need to export it OK, I will move it to clk-phase-delay.c. Thanks for the review. > >> + >> /* clk_ops */ >> extern const struct clk_ops meson_clk_pll_ro_ops; >> extern const struct clk_ops meson_clk_pll_ops; >> @@ -112,5 +124,6 @@ struct clk_regmap _name = { >> \ >> extern const struct clk_ops meson_clk_mpll_ro_ops; >> extern const struct clk_ops meson_clk_mpll_ops; >> extern const struct clk_ops meson_clk_phase_ops; >> +extern const struct clk_ops meson_clk_phase_delay_ops; >> >> #endif /* __CLKC_H */ > > > . >