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[209.132.180.67]) by mx.google.com with ESMTP id n187si1401748pfn.83.2018.12.13.02.35.59; Thu, 13 Dec 2018 02:36:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=L0Ec6l3U; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728645AbeLMKd1 (ORCPT + 99 others); Thu, 13 Dec 2018 05:33:27 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:40927 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727374AbeLMKd0 (ORCPT ); Thu, 13 Dec 2018 05:33:26 -0500 Received: by mail-wr1-f65.google.com with SMTP id p4so1430319wrt.7 for ; Thu, 13 Dec 2018 02:33:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vmdixF+4jff1Pn/iHQJssFMMOyTTldk15RkZzWSnpiw=; b=L0Ec6l3UbT8a8xiH2W75tnUq0uKiWojGPxSUBkgnk3sBtJ+P7QOug09BrbFOtCfxal ql7iQa5HRHCUS/RO1Yx9SAoW5UlMbfty1c1sPtSHcWH5JT5tOqhwvjYtpTd20xCfdCd6 6NTiGjJIPOVMvnb/n0WD9QLNsIjo1mkCNsQmE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vmdixF+4jff1Pn/iHQJssFMMOyTTldk15RkZzWSnpiw=; b=FQ69SCeSZqRs8ymMUmLRJMB/osALwXeMKVqVU6EWeA+YdO2fTu77nGWYmqVzjRExOs LVBb2FsMYBWYdTezQ78ATVgT12le8iSIv3tEbPNicdEk+iTUUFslRoCy2vvGOw3YPM4N lAdQkq4WIL4GgbLxTjvD9hmcWaFCcdUqL1woyH0MT93/NiNoHOfqZR7wpu+2xRCVluZL WubG5u1zoQmxrSTpZfDbrbgz1cONG6nArFjiEClwqFjdh6scg+kAV7lGL3tRxNungKPe +PqA5mggcqk7ij4RY4i6AYzbWYxOxMa2P8cJrfmMpFVkDH0L7jSMoKXT5JdbS1JLmgx1 dVjw== X-Gm-Message-State: AA+aEWatXtwkeSWP3UNYHCWl9AkAmByKcW18HG2+WhtB5mVJ6dukxBgv XBzeDLnyEEDEBajZ5YovBGXcnw== X-Received: by 2002:adf:9168:: with SMTP id j95mr19904609wrj.217.1544697205094; Thu, 13 Dec 2018 02:33:25 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x76sm3327058wmd.27.2018.12.13.02.33.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Dec 2018 02:33:24 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , poza@codeaurora.org, Joerg Roedel , Lorenzo Pieralisi , Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v2 2/3] iommu/dma: IOVA reserve for PCI host reserve address list Date: Thu, 13 Dec 2018 16:02:53 +0530 Message-Id: <1544697174-6029-3-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> References: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PCI host bridge has list of resource entries contain address ranges for which IOVA address mapping has to be reserve. These address ranges are the address holes in dma-ranges DT property. It is similar to PCI IO resources address ranges reserving in IOMMU for each EP connected to host bridge. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep --- drivers/iommu/dma-iommu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 511ff9a..346da81 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -220,6 +220,14 @@ static void iova_reserve_pci_windows(struct pci_dev *dev, hi = iova_pfn(iovad, window->res->end - window->offset); reserve_iova(iovad, lo, hi); } + + /* Get reserved DMA windows from host bridge */ + resource_list_for_each_entry(window, &bridge->dma_resv) { + + lo = iova_pfn(iovad, window->res->start - window->offset); + hi = iova_pfn(iovad, window->res->end - window->offset); + reserve_iova(iovad, lo, hi); + } } static int iova_reserve_iommu_regions(struct device *dev, -- 2.7.4