Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp840768imu; Thu, 13 Dec 2018 05:27:49 -0800 (PST) X-Google-Smtp-Source: AFSGD/XUwOkrqd21B3MGDyf0PdmvvGgshF6H0I1MN+dUyoWWnZCn9QunNpAehHIdMpmXTjbypt/N X-Received: by 2002:a62:7796:: with SMTP id s144mr23941227pfc.26.1544707669521; Thu, 13 Dec 2018 05:27:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544707669; cv=none; d=google.com; s=arc-20160816; b=UGVzUBhiJqX2xosOw+om99U0ghRSQ8QVDWosmv+xxmxbXUv4IKfU1nJgRYePBZ3Gmp 4CnuS5KGVribuxk/hDdHSvo7QP/RSNRR3i5tEp7Q6kDUFpWnRrQ5//2N6ZdQvQXnChFu Yy7dEhT57J5webIgQcL2/kGhABZTzPsmIOz2UJYg184ApsjqXfGyQkzOz60qDDIdBgV5 AOvLeAVfYCkDNAL+sfqIYvYxxkCfLqy2nYcKLZ6nRKUqv6v5nVBxa6m9koOaQ9quHMgy wJCFHt4YaTVQvISgeAeIf+4/voe78tX3V4iPdXYfPYhgzhAK+k4uQfj8q/p/dqA4cRSV ZvaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=oXiA95hdl/tTIY8l/N/tQKeSyLOu5Lns9jevTF89iXQ=; b=si0VMSwGyuK787RGaa+6WEeCdDLwW0yDyrnipGbjZHlIg4t86HbAiSf1ElOlgjOips gvtYLdtVvZ4DuaV7GcZzhZkoEnlBOw5D41nwfuvE0reoa/hIsczbVaLA7iqKj2871BYx lQwB5VGUBFFYAf2wD6jqmQA9Ieel6CiPzWTej7xHTDMUqAm4yUVrodisnAcW0jqEB9j3 fi9OxcRL2I5jScyNtjar8ESJXB8FVFD99XPNfzYysX2YO8boTo73jkdqrEFOGwBr/zPK cN7dBeiPuoRasMJz55MRtrM+vZcb6AmcaJ0OUi312zy3CHYRj5a+piavzGBO2uiIuGXJ 2hrg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w19si1566612pgf.573.2018.12.13.05.27.30; Thu, 13 Dec 2018 05:27:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729469AbeLMNZP (ORCPT + 99 others); Thu, 13 Dec 2018 08:25:15 -0500 Received: from mail-sz2.amlogic.com ([211.162.65.114]:48791 "EHLO mail-sz2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729298AbeLMNZO (ORCPT ); Thu, 13 Dec 2018 08:25:14 -0500 Received: from [10.28.18.96] (10.28.18.96) by mail-sz2.amlogic.com (10.28.11.6) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Thu, 13 Dec 2018 21:25:38 +0800 Subject: Re: [PATCH v2 3/3] spi: meson-axg: add a linear clock divider support To: Neil Armstrong , Mark Brown CC: Yixun Lan , Jerome Brunet , Kevin Hilman , Carlo Caione , Jianxin Pan , Xingyu Chen , , , , References: <1544690354-16409-1-git-send-email-sunny.luo@amlogic.com> <1544690354-16409-4-git-send-email-sunny.luo@amlogic.com> <3cc699dc-4021-b993-2b47-b00b40f380f8@baylibre.com> From: Sunny Luo Message-ID: <35518e71-027c-749e-1075-19ddc0410b19@amlogic.com> Date: Thu, 13 Dec 2018 21:25:38 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:60.0) Gecko/20100101 Thunderbird/60.3.3 MIME-Version: 1.0 In-Reply-To: <3cc699dc-4021-b993-2b47-b00b40f380f8@baylibre.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Originating-IP: [10.28.18.96] X-ClientProxiedBy: mail-sz2.amlogic.com (10.28.11.6) To mail-sz2.amlogic.com (10.28.11.6) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Neil, On 2018/12/13 16:55, Neil Armstrong wrote: > Hi Sunny, > > On 13/12/2018 09:39, Sunny Luo wrote: >> The SPICC controller in Meson-AXG SoC is capable of using >> a linear clock divider to reach a much fine tuned range of clocks, >> while the old controller only use a power of two clock divider, >> result at a more coarse clock range. > > This patch should definitely go before patch 1. Would you please show the reason? > >> >> + /* Set master mode and enable controller */ >> + writel_relaxed(SPICC_ENABLE | SPICC_MODE_MASTER, >> + spicc->base + SPICC_CONREG); > > Please remove it from meson_spicc_prepare_message() now. > Yes, I moved it here and forgot remove it at prepare_message().