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From:   Weiyi Lu <weiyi.lu@mediatek.com>
To:     Matthias Brugger <matthias.bgg@gmail.com>,
        Stephen Boyd <sboyd@codeaurora.org>,
        Rob Herring <robh@kernel.org>
CC:     James Liao <jamesjj.liao@mediatek.com>,
        Fan Chen <fan.chen@mediatek.com>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>,
        <linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
        <srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [resend PATCH v1 0/2] update Mediatek MT2712 clock
Date:   Fri, 14 Dec 2018 10:04:15 +0800
Message-ID: <20181214020417.2871-2-weiyi.lu@mediatek.com>
In-Reply-To: <20181214020417.2871-1-weiyi.lu@mediatek.com>
References: <20181214020417.2871-1-weiyi.lu@mediatek.com>
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Sender: linux-kernel-owner@vger.kernel.org
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This series is based on v4.20-rc1.
Basically, this series is for the 3rd ECO design change of MT2712.

Weiyi Lu (2):
  dt-bindings: clock: add clock for MT2712
  clk: mediatek: update clock driver of MT2712

 drivers/clk/mediatek/clk-mt2712.c      | 8 ++++++--
 include/dt-bindings/clock/mt2712-clk.h | 3 ++-
 2 files changed, 8 insertions(+), 3 deletions(-)

-- 
2.18.0