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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: PsEJc3jrPkaWeRthBJa/iq8ngQEAVZewV6LV2brgX8Yw8DG+5QptwA1Yy2hItpzc0EnzNh8Ov6UFRQDQGkCBhPUwnMRWRDB7mEsiZ2Rk0IbZFChJ6UCUCYGeogMv3EnDnT819aD4u2XxObUigZ+OyhQ70PGlxCsvXWhBuuaxzEglKpfx4u06GkbA9x2m60TX5YqdXVoWCCQjm/eqUZ65lsbCLi1gqdL2fGQ+CaAN6lWpKP1cpiOaOfFL0LhFNLGpe7lacb6Mgv/YnLvUcx3/DquWIEhXxVwPmW6fF8ANi2WOtMZiFQN1lVh+DTIy4ccY spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6013d17e-3409-4ab0-6774-08d6619d0016 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Dec 2018 08:20:26.0923 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3740 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org i.MX7ULP SoC's revision info is inside the SIM module, bit[31:28] of JTAG_ID register defines revision as below from B0: 0001 B0 0010 B1 This patch adds SoC revision support for i.MX7ULP, test result as below: root@imx7ulp-evk ~$ cat /sys/devices/soc0/revision 2.1 Signed-off-by: Anson Huang --- arch/arm/mach-imx/mach-imx7ulp.c | 39 ++++++++++++++++++++++++++++++++++++= +++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7= ulp.c index f7c9d01..95efb2d 100644 --- a/arch/arm/mach-imx/mach-imx7ulp.c +++ b/arch/arm/mach-imx/mach-imx7ulp.c @@ -6,18 +6,57 @@ */ =20 #include +#include #include +#include #include =20 #include "common.h" #include "cpuidle.h" #include "hardware.h" =20 +#define SIM_JTAG_ID_REG 0x8c + +static void __init imx7ulp_set_revision(void) +{ + struct regmap *sim; + u32 revision; + + sim =3D syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim"); + if (IS_ERR(sim)) { + pr_warn("failed to find fsl,imx7ulp-sim regmap!\n"); + return; + } + + if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) { + pr_warn("failed to read sim regmap!\n"); + return; + } + + /* + * bit[31:28] of JTAG_ID register defines revision as below from B0: + * 0001 B0 + * 0010 B1 + */ + switch (revision >> 28) { + case 1: + imx_set_soc_revision(IMX_CHIP_REVISION_2_0); + break; + case 2: + imx_set_soc_revision(IMX_CHIP_REVISION_2_1); + break; + default: + imx_set_soc_revision(IMX_CHIP_REVISION_1_0); + break; + } +} + static void __init imx7ulp_init_machine(void) { imx7ulp_pm_init(); =20 mxc_set_cpu_type(MXC_CPU_IMX7ULP); + imx7ulp_set_revision(); of_platform_default_populate(NULL, NULL, imx_soc_device_init()); } =20 --=20 2.7.4