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[209.132.180.67]) by mx.google.com with ESMTP id o11si3898043pll.160.2018.12.14.05.46.47; Fri, 14 Dec 2018 05:47:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729947AbeLNNoj (ORCPT + 99 others); Fri, 14 Dec 2018 08:44:39 -0500 Received: from mx1.redhat.com ([209.132.183.28]:20360 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726554AbeLNNoj (ORCPT ); Fri, 14 Dec 2018 08:44:39 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C47AB3164698; Fri, 14 Dec 2018 13:44:38 +0000 (UTC) Received: from localhost (unknown [10.36.118.25]) by smtp.corp.redhat.com (Postfix) with ESMTP id 41994600C1; Fri, 14 Dec 2018 13:44:35 +0000 (UTC) Date: Fri, 14 Dec 2018 13:44:34 +0000 From: Stefan Hajnoczi To: Cornelia Huck Cc: David Hildenbrand , "Dr. David Alan Gilbert" , Vivek Goyal , linux-fsdevel@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, miklos@szeredi.hu, sweil@redhat.com, swhiteho@redhat.com Subject: Re: [PATCH 18/52] virtio-fs: Map cache using the values from the capabilities Message-ID: <20181214134434.GA3882@stefanha-x1.localdomain> References: <20181210171318.16998-1-vgoyal@redhat.com> <20181210171318.16998-19-vgoyal@redhat.com> <20181213091320.GA2313@work-vm> <20181213100058.GC2313@work-vm> <96d9ea85-ddf3-3331-77ce-124475b26da4@redhat.com> <20181213121548.GN2313@work-vm> <0f1b43f6-57e3-c6d2-7ffe-cf783e125a7b@redhat.com> <20181213133823.2272736b.cohuck@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="6c2NcOVqGQ03X4Wi" Content-Disposition: inline In-Reply-To: <20181213133823.2272736b.cohuck@redhat.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Fri, 14 Dec 2018 13:44:38 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --6c2NcOVqGQ03X4Wi Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Dec 13, 2018 at 01:38:23PM +0100, Cornelia Huck wrote: > On Thu, 13 Dec 2018 13:24:31 +0100 > David Hildenbrand wrote: >=20 > > On 13.12.18 13:15, Dr. David Alan Gilbert wrote: > > > * David Hildenbrand (david@redhat.com) wrote: =20 > > >> On 13.12.18 11:00, Dr. David Alan Gilbert wrote: =20 > > >>> * David Hildenbrand (david@redhat.com) wrote: =20 > > >>>> On 13.12.18 10:13, Dr. David Alan Gilbert wrote: =20 > > >>>>> * David Hildenbrand (david@redhat.com) wrote: =20 > > >>>>>> On 10.12.18 18:12, Vivek Goyal wrote: =20 > > >>>>>>> Instead of assuming we had the fixed bar for the cache, use the > > >>>>>>> value from the capabilities. > > >>>>>>> > > >>>>>>> Signed-off-by: Dr. David Alan Gilbert > > >>>>>>> --- > > >>>>>>> fs/fuse/virtio_fs.c | 32 +++++++++++++++++--------------- > > >>>>>>> 1 file changed, 17 insertions(+), 15 deletions(-) > > >>>>>>> > > >>>>>>> diff --git a/fs/fuse/virtio_fs.c b/fs/fuse/virtio_fs.c > > >>>>>>> index 60d496c16841..55bac1465536 100644 > > >>>>>>> --- a/fs/fuse/virtio_fs.c > > >>>>>>> +++ b/fs/fuse/virtio_fs.c > > >>>>>>> @@ -14,11 +14,6 @@ > > >>>>>>> #include > > >>>>>>> #include "fuse_i.h" > > >>>>>>> =20 > > >>>>>>> -enum { > > >>>>>>> - /* PCI BAR number of the virtio-fs DAX window */ > > >>>>>>> - VIRTIO_FS_WINDOW_BAR =3D 2, > > >>>>>>> -}; > > >>>>>>> - > > >>>>>>> /* List of virtio-fs device instances and a lock for the list = */ > > >>>>>>> static DEFINE_MUTEX(virtio_fs_mutex); > > >>>>>>> static LIST_HEAD(virtio_fs_instances); > > >>>>>>> @@ -518,7 +513,7 @@ static int virtio_fs_setup_dax(struct virti= o_device *vdev, struct virtio_fs *fs) > > >>>>>>> struct dev_pagemap *pgmap; > > >>>>>>> struct pci_dev *pci_dev; > > >>>>>>> phys_addr_t phys_addr; > > >>>>>>> - size_t len; > > >>>>>>> + size_t bar_len; > > >>>>>>> int ret; > > >>>>>>> u8 have_cache, cache_bar; > > >>>>>>> u64 cache_offset, cache_len; > > >>>>>>> @@ -551,17 +546,13 @@ static int virtio_fs_setup_dax(struct vir= tio_device *vdev, struct virtio_fs *fs) > > >>>>>>> } > > >>>>>>> =20 > > >>>>>>> /* TODO handle case where device doesn't expose BAR? */ =20 > > >>>>>> > > >>>>>> For virtio-pmem we decided to not go via BARs as this would effe= ctively > > >>>>>> make it only usable for virtio-pci implementers. Instead, we are= going > > >>>>>> to export the applicable physical device region directly (e.g. > > >>>>>> phys_start, phys_size in virtio config), so it is decoupled from= PCI > > >>>>>> details. Doing the same for virtio-fs would allow e.g. also virt= io-ccw > > >>>>>> to make eventually use of this. =20 > > >>>>> > > >>>>> That makes it a very odd looking PCI device; I can see that with > > >>>>> virtio-pmem it makes some sense, given that it's job is to expose > > >>>>> arbitrary chunks of memory. > > >>>>> > > >>>>> Dave =20 > > >>>> > > >>>> Well, the fact that your are > > >>>> > > >>>> - including > > >>>> - adding pci related code > > >>>> > > >>>> in/to fs/fuse/virtio_fs.c > > >>>> > > >>>> tells me that these properties might be better communicated on the > > >>>> virtio layer, not on the PCI layer. > > >>>> > > >>>> Or do you really want to glue virtio-fs to virtio-pci for all eter= nity? =20 > > >>> > > >>> No, these need cleaning up; and the split within the bar > > >>> is probably going to change to be communicated via virtio layer > > >>> rather than pci capabilities. However, I don't want to make our PCI > > >>> device look odd, just to make portability to non-PCI devices - so i= t's > > >>> right to make the split appropriately, but still to use PCI bars > > >>> for what they were designed for. > > >>> > > >>> Dave =20 > > >> > > >> Let's discuss after the cleanup. In general I am not convinced this = is > > >> the right thing to do. Using virtio-pci for anything else than pure > > >> transport smells like bad design to me (well, I am no virtio expert > > >> after all ;) ). No matter what PCI bars were designed for. If we can= 't > > >> get the same running with e.g. virtio-ccw or virtio-whatever, it is > > >> broken by design (or an addon that is tightly glued to virtio-pci, if > > >> that is the general idea). =20 > > >=20 > > > I'm sure we can find alternatives for virtio-*, so I wouldn't expect > > > it to be glued to virtio-pci. > > >=20 > > > Dave =20 > >=20 > > As s390x does not have the concept of memory mapped io (RAM is RAM, > > nothing else), this is not architectured. vitio-ccw can therefore not > > define anything similar like that. However, in virtual environments we > > can do whatever we want on top of the pure transport (e.g. on the virtio > > layer). > >=20 > > Conny can correct me if I am wrong. >=20 > I don't think you're wrong, but I haven't read the code yet and I'm > therefore not aware of the purpose of this BAR. >=20 > Generally, if there is a memory location shared between host and guest, > we need a way to communicate its location, which will likely differ > between transports. For ccw, I could imagine a new channel command > dedicated to exchanging configuration information (similar to what > exists today to communicate the locations of virtqueues), but I'd > rather not go down this path. >=20 > Without reading the code/design further, can we use one of the > following instead of a BAR: > - a virtqueue; > - something in config space? > That would be implementable by any virtio transport. The way I think about this is that we wish to extend the VIRTIO device model with the concept of shared memory. virtio-fs, virtio-gpu, and virtio-vhost-user all have requirements for shared memory. This seems like a transport-level issue to me. PCI supports memory-mapped I/O and that's the right place to do it. If you try to put it into config space or the virtqueue, you'll end up with something that cannot be realized as a PCI device because it bypasses PCI bus address translation. If CCW needs a side-channel, that's fine. But that side-channel is a CCW-specific mechanism and probably doesn't apply to all other transports. Stefan --6c2NcOVqGQ03X4Wi Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEcBAEBAgAGBQJcE7PCAAoJEJykq7OBq3PIMFYH/jeBc51Y0ll9T3VpqOnw+s8c rZm12EZkXgO4iQ+sVx/SizVXB6WaBsHiHmmH9HjwRCjVtToToTgr9D/nlp3txiiD TRaB5GkSVn0Tcj7CaR2JNOfyavyp2+w8eNJjPciYOhInZNBacYJGZHVRLL7kME3s OjItin/kK6VvN3sZ/T4+R4QFXxBUaYkFik5kcy1BpsTEvipDYBp2rg8M757CNfvt 60bMNUyZbbwsz0GVeKTcm1y5iBsd86jIns83isPiFrQhqJLWDnAONrdmjJfQ+yQf StY0Z/obE7fxdX1Lf4Bj16wNoeS+0SSDZRipYTsZahVdKH+vETiDwyRVjAdXG+M= =OFja -----END PGP SIGNATURE----- --6c2NcOVqGQ03X4Wi--