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Peter Anvin" , "linux-kernel@vger.kernel.org" , "linux-sgx@vger.kernel.org" , Andy Lutomirski , Josh Triplett , Haitao Huang , "Dr . Greg Wettstein" Subject: Re: [RFC PATCH v4 5/5] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions Message-ID: <20181214153830.GB22063@linux.intel.com> References: <20181213213135.12913-1-sean.j.christopherson@intel.com> <20181213213135.12913-6-sean.j.christopherson@intel.com> <20181214151204.GA22063@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181214151204.GA22063@linux.intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 14, 2018 at 07:12:04AM -0800, Sean Christopherson wrote: > On Fri, Dec 14, 2018 at 09:55:49AM +0000, Jethro Beekman wrote: > > On 2018-12-14 03:01, Sean Christopherson wrote: > > >+2: pop %rbx > > >+ pop %r12 > > >+ pop %r13 > > >+ pop %r14 > > >+ pop %r15 > > >+ pop %rbp > > >+ ret > > > > x86-64 ABI requires that you call CLD here (enclave may set it). > > Ugh. Technically MXCSR and the x87 CW also need to be preserved. > > What if rather than treating the enclave as hostile we require it to be > compliant with the x86-64 ABI like any other function? That would solve > the EFLAGS.DF, MXCSR and x87 issues without adding unnecessary overhead. > And we wouldn't have to save/restore R12-R15. It'd mean we couldn't use > the stack's red zone to hold @regs and @e, but that's poor form anyways. Grr, except the processor crushes R12-R15, FCW and MXCSR on asynchronous exits. But not EFLAGS.DF, that's real helpful.