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[209.132.180.67]) by mx.google.com with ESMTP id 69si5493505pgc.164.2018.12.14.21.23.47; Fri, 14 Dec 2018 21:24:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=J62dUlTt; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729974AbeLOFWc (ORCPT + 99 others); Sat, 15 Dec 2018 00:22:32 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:40649 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729895AbeLOFWb (ORCPT ); Sat, 15 Dec 2018 00:22:31 -0500 Received: by mail-pg1-f195.google.com with SMTP id z10so3622014pgp.7 for ; Fri, 14 Dec 2018 21:22:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rns3Vf+c9+ywyiS18gu90x3HnhyKwds1kllzbtX3Q60=; b=J62dUlTtyNLNHvnZF04YuUru8ICvHmE2SBsJz8NXX1KtrklTO5+cFaZHMwOdIrzVFY koLJRAqW2pUloCu2eg08Va4ACLiTRZJvrPufVf+RtYFmgFWlBisGxokUUMLZvW7Qvner YuoYzGxY8gOMEV7RUoIxlsyFQz8dhLdPTZV4TFcMbqQZUdlrYSVi03ys8INnwfXKuk6D oP9xgLCVUXepcvWHn936uwFkYT7PvgzOwtV9AOZUBosrnjvSJmtzZ3IFCYL2Buc7dR3K 4cnnHhzoONPIfuv+Kms9dm/qQ7Mlkc03aDqZKOmfAnhAd91rdqzzunYUjIaDLhZdSE5X 8oFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rns3Vf+c9+ywyiS18gu90x3HnhyKwds1kllzbtX3Q60=; b=mT3KtalmNK86my8PFZMgJ/1rmCZvHdh1tT64BC36eYAaIMTTeT0jGjkaYp4ScgBPqP LPpT9EY8e9MMRtsaeoax4I5pJdeE4VPzRStUNxCkAZ/gHBNpQbUpJEOKgOr7S69+qj5O lFnc7lJLhoIYkmKlCsXo3ri4YIp0nnd5fZUWi4ecFICWmJa8pBAztH1AYnLO6t/zOluW YpmTTFr43ZKNB5CGh5onbVaF+3/vTDtM6Uu8GRCqtMKtVz4P+W2nudaJWvgvezBpizpH SDu27g0gINFcBW/6t4ayntGHyjWVeARbB75V9mL/5of8R6QzcEQMAANFQO8V/rw2gSr/ 7KrA== X-Gm-Message-State: AA+aEWZS/ieBHxJ+sTkJezDjPKNTl4qrQSBQGMWph1Ka8ulBfoaycIQp iWhZb9FRVeTZ9T4TbCLeiYkBXjtzCng= X-Received: by 2002:a62:d885:: with SMTP id e127mr5346845pfg.197.1544851349513; Fri, 14 Dec 2018 21:22:29 -0800 (PST) Received: from viisi.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id z127sm11351282pfb.80.2018.12.14.21.22.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Dec 2018 21:22:29 -0800 (PST) From: Paul Walmsley To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Paul Walmsley , Rob Herring , Mark Rutland , Palmer Dabbelt , Albert Ou , devicetree@vger.kernel.org, Paul Walmsley Subject: [PATCH 2/7] dt-bindings: riscv: sifive: add documentation for the SiFive FU540 Date: Fri, 14 Dec 2018 21:21:49 -0800 Message-Id: <20181215052154.24347-3-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20181215052154.24347-1-paul.walmsley@sifive.com> References: <20181215052154.24347-1-paul.walmsley@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT binding documentation for the SiFive FU540 SoC. This SoC is documented at: https://static.dev.sifive.com/FU540-C000-v1.0.pdf This file is originally based on Documentation/devicetree/bindings/arm/ti/k3.txt. Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt Cc: Albert Ou Cc: devicetree@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley --- .../devicetree/bindings/riscv/sifive/fu540.txt | 14 ++++++++++++++ MAINTAINERS | 9 +++++++++ 2 files changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/sifive/fu540.txt diff --git a/Documentation/devicetree/bindings/riscv/sifive/fu540.txt b/Documentation/devicetree/bindings/riscv/sifive/fu540.txt new file mode 100644 index 000000000000..b5cf2b9f9a75 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/sifive/fu540.txt @@ -0,0 +1,14 @@ +SiFive FU540 SoC architecture device tree bindings +-------------------------------------------------- + +Platforms based on the SiFive FU540 RISC-V SoC should follow the +scheme described below: + +SoCs +---- + +Each device tree root node must specify one of the following +compatible-string values: + +- Freedom Unleashed 540 rev. C000, or "FU540" + compatible = "sifive,fu540-c000", "sifive,fu540" diff --git a/MAINTAINERS b/MAINTAINERS index 8119141a926f..dee555ceb175 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13626,6 +13626,15 @@ S: Supported K: sifive N: sifive +SIFIVE FU540 SYSTEM-ON-CHIP +M: Paul Walmsley +M: Palmer Dabbelt +L: linux-riscv@lists.infradead.org +T: git git://git.kernel.org/pub/scm/linux/kernel/git/pjw/sifive.git +S: Supported +K: fu540 +N: fu540 + SILEAD TOUCHSCREEN DRIVER M: Hans de Goede L: linux-input@vger.kernel.org -- 2.20.0