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[209.132.180.67]) by mx.google.com with ESMTP id q8si6253912pli.284.2018.12.14.23.43.07; Fri, 14 Dec 2018 23:43:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729671AbeLOHlk (ORCPT + 99 others); Sat, 15 Dec 2018 02:41:40 -0500 Received: from mo4-p01-ob.smtp.rzone.de ([85.215.255.51]:20605 "EHLO mo4-p01-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726030AbeLOHlj (ORCPT ); Sat, 15 Dec 2018 02:41:39 -0500 X-RZG-AUTH: ":OH8QVVOrc/CP6za/qRmbF3BWedPGA1vjs2e0bDjfg8OiOrPJifeRMRhMZvCxcJErFBRp4dQsAj0geA==" X-RZG-CLASS-ID: mo00 Received: from [192.168.2.24] by smtp.strato.de (RZmta 44.8 DYNA|AUTH) with ESMTPSA id V03c59uBF7fV75T (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Sat, 15 Dec 2018 08:41:31 +0100 (CET) Subject: Re: Can we drop upstream Linux x32 support? To: Andy Lutomirski Cc: X86 ML , LKML , Linux API , "H. Peter Anvin" , Peter Zijlstra , Borislav Petkov , Florian Weimer , Mike Frysinger , "H. J. Lu" , Rich Felker , x32@buildd.debian.org, Arnd Bergmann , Will Deacon , Catalin Marinas , Linus Torvalds References: <6577ac4f-524c-37f4-a4d0-6eb94ec7d9a5@schoebel-theuer.de> <35905587-2d7b-c0ab-e081-2b938d60e881@schoebel-theuer.de> From: Thomas Schoebel-Theuer Message-ID: <54449048-a057-5005-1b50-b884628643eb@schoebel-theuer.de> Date: Sat, 15 Dec 2018 08:41:30 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <35905587-2d7b-c0ab-e081-2b938d60e881@schoebel-theuer.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/14/18 22:41, Thomas Schöbel-Theuer wrote: > On 12/14/18 22:24, Andy Lutomirski wrote: >> >> I'm talking about x32, which is a different beast. >> > > So from my viewpoint the mentioned roadmap / timing requirements will > remain the same, whatever you are dropping. > > Enterprise-critical use cases will probably need to be migrated to > KVM/qemu together with their old kernel versions, anyway (because the > original hardware will be no longer available in a few decades). > Here is a systematic approach to the problem. AFAICS legacy 32bit userspace code (which exists in some notable masses) can be executed at least in the following ways: 1) natively on 32bit-capable hardware, under 32bit kernels. Besides legacy hardware, this also encompasses most current Intel / AMD 64bit hardware in 32bit compatibility mode. 2) under 64bit kernels, using the 32bit compat layer from practically any kernel version. 3) under KVM/qemu. When you just drop 1), users have a fair chance by migrating to any of the other two possibilities. As explained, a time frame of ~5 years should work for the vast majority. If you clearly explain the migration paths to your users (and to the press), I think it will be acceptable. [side note: I know of a single legacy instance which is now ~20 years old, but makes a revenue of several millions per month. These guys have large quantities of legacy hardware in stock. And they have enough money to hire a downstream maintainer in case of emergency.] Fatal problems would only arise if you would drop all three possibilities in the very long term. In ~100 years, possibility 3) should be sufficient for handling use cases like preservation of historic documents. The latter is roughly equivalent to running binary-only MSDOS, Windows NT, and similar, even in 100 years, and even non-natively under future hardware architectures.