Date: Thu, 22 Jan 2004 09:40:49 -0700
From: Grant Grundler <grundler@parisc-linux.org>
To: "Durairaj, Sundarapandian" <sundarapandian.durairaj@intel.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@atrey.karlin.mff.cuni.cz,
       torvalds@osdl.org, alan@lxorguk.ukuu.org.uk, greg@kroah.com,
       Andi Kleen <ak@colin2.muc.de>,
       "Kondratiev, Vladimir" <vladimir.kondratiev@intel.com>,
       "Seshadri, Harinarayanan" <harinarayanan.seshadri@intel.com>
Subject: Re: [patch] PCI Express Enhanced Config Patch - 2.6.0-test11
Message-ID: <20040122164049.GB13354@colo.lackof.org>
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On Thu, Jan 22, 2004 at 03:51:22PM +0530, Durairaj, Sundarapandian wrote:
> I tested it on our i386 platform. 

Any chance Intel can test this on an IA64 box?

...
>  /*
> + *We map full Page size on each request. Incidently that's the size we
> + *have for config space too.
> + */

"full Page size" != 4k on several architectures.
PCI Express is going to be implemented on ia64 and power as well.

...
> diff -Naur linux-2.6.0/include/asm-i386/pci.h
...
> +#ifdef CONFIG_PCI_EXPRESS
> +/*
> + *Variable used to store the base address of the last pciexpress device
> + *accessed.
> + */
> +static u32 pcie_last_accessed_device;

Andi is right - this is a definite no-no.

grant
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