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[209.132.180.67]) by mx.google.com with ESMTP id n8si12542775plk.9.2018.12.18.06.07.58; Tue, 18 Dec 2018 06:08:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=JKTqT2Ir; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726934AbeLROGW (ORCPT + 99 others); Tue, 18 Dec 2018 09:06:22 -0500 Received: from mail-ot1-f65.google.com ([209.85.210.65]:40196 "EHLO mail-ot1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726905AbeLROGV (ORCPT ); Tue, 18 Dec 2018 09:06:21 -0500 Received: by mail-ot1-f65.google.com with SMTP id s5so15728399oth.7 for ; Tue, 18 Dec 2018 06:06:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=08qcU/paV60f68CKwP0K6iUIgv1ssi9UDah9m0cgFw0=; b=JKTqT2IrrdgWv8HD2n5ENP8PWzibXanHkd0kGEibc8aekkP7j0Vv4VS6Kjbk7S9V9D AasHpdw98CBgxNCtJs0ToaHGoTo55AgjqWBRNVOaO2dBZ/04gIgS0zHJCNS/pzM5BKkw Q5l5Gd1d2yhZ70pkgbJqL8Dq9CzHpRAi/XFQX3tyHPFig3hm7DbBOioeXEPXv7lSLVQ6 DEyZqly0rwS2EPzNxRYHtRH80VgvW2JDW/tOqDZnamYDdD4xPKAAmbaoRWydpPVrm0sh I5C5xtrSsb278PDTFzEOLd3I80GJUYEEQjnt8OeVviCS3oZkEQC1NHlx/khViZhaetYd bFbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=08qcU/paV60f68CKwP0K6iUIgv1ssi9UDah9m0cgFw0=; b=oSHnYGdyVH42PAC0IYhcucQecmAiD0G5TRbrb5vW9LzeTThkqPeKC1dL7xm+rboBPU j3saWLdM4L9VIWLsiJ+D7JsFwdgTxgP0j7ziAB33yRoSkIS34BRzVs9yVFdEdU+Cmr3k PUK2BcZNgb4BXG63tRdJRTCqn4wpEIuVMWakoxzZ57NuV748sqNUvq4/k0gzrZ7Y/QsX x2jKm2E3UOAbJtP10vadyKnfgu6Xrl7NFUJ050myXP+eabZmvf6sFJNR5sePkX7omuQE R8v000DcUViUYU6uxxopyPX7SUjS1jBsihgdJK4aVSndC9BP/TCXgp0HFn56+VgiaTdy 3leA== X-Gm-Message-State: AA+aEWZyhXge1PfA+kAF1KO5crB6ABpi7ARgRl31Ak2uD0FjwLXBW0kH U2xgzsD8I8uxEXqea3zR6aWrTh3ZVEz5uDkBcfz73g== X-Received: by 2002:a9d:22e2:: with SMTP id y89mr11799293ota.108.1545141980294; Tue, 18 Dec 2018 06:06:20 -0800 (PST) MIME-Version: 1.0 References: <20181217153652.20056-1-jank@cadence.com> <20181217153652.20056-3-jank@cadence.com> <220ECBA7-CD30-4221-8878-0DA93390DDCC@global.cadence.com> In-Reply-To: <220ECBA7-CD30-4221-8878-0DA93390DDCC@global.cadence.com> From: Bartosz Golaszewski Date: Tue, 18 Dec 2018 15:06:09 +0100 Message-ID: Subject: Re: [PATCH v2 2/2] gpio: Add Cadence GPIO driver To: Janek Kotas Cc: Linus Walleij , Rob Herring , Mark Rutland , linux-gpio , linux-devicetree , LKML Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org wt., 18 gru 2018 o 14:54 Janek Kotas napisa=C5=82(a): > > > > On 18 Dec 2018, at 13:50, Bartosz Golaszewski wrote: > > > > > > pon., 17 gru 2018 o 23:22 Linus Walleij napi= sa=C5=82(a): > >> > >> On Mon, Dec 17, 2018 at 4:51 PM Bartosz Golaszewski > >> wrote: > >> > >>> The driver looks good but is there any particular reason not to use > >>> regmap for register IO? > >> > >> I thought we only use regmap for MMIO when the register range is > >> shared (as in a system controller) so that some registers are for this= , > >> some register or even bits in a register for some other driver, so the= y > >> need the spinlock in the regmap to protect the register range. > >> > > > > This is what syscon is for. Regmap simply abstracts any register IO. > > For instance: there's no locking in this driver. Are we sure it's not > > needed? Regmap provides internal locking for you in the form of a > > mutex or spinlock. > > > > Also: it looks like the interrupts here are quite simple with a single > > bit per interrupt in the status register and the same layout in the > > mask register - it could probably profit from using the > > regmap_irq_chip and not bother with reimplementing irq_chip callbacks. > > > >> It is also nice for shadowing/caching of register contents I guess, > >> wat does this driver get from regmap MMIO? > >> > > > > Code shrinkage IMO. > > > > Note that I'm not blocking this from being merged - I just think that > > using modern frameworks is always a good idea. > > I can reimplement the driver using regmap, but It seems in such case > I won=E2=80=99t be able to use the Generic GPIO Infrastructure, would I? > So I would need to provide functions for setting direction, etc. > I think it would make the driver code bigger. > Indeed. If anything: gpio-mmio would need to be converted to using regmap. So I guess nevermind my comment. Bart