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Date:   Tue, 18 Dec 2018 16:32:26 +0100 (CET)
From:   Thomas Gleixner <tglx@linutronix.de>
To:     "Li, Aubrey" <aubrey.li@linux.intel.com>
cc:     Aubrey Li <aubrey.li@intel.com>, mingo@redhat.com,
        peterz@infradead.org, hpa@zytor.com, ak@linux.intel.com,
        tim.c.chen@linux.intel.com, dave.hansen@intel.com,
        arjan@linux.intel.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/3] x86/fpu: track AVX-512 usage of tasks
In-Reply-To: <62997df2-0817-b54d-b11e-00a567f1d67c@linux.intel.com>
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References: <20181218042218.8653-1-aubrey.li@intel.com> <alpine.DEB.2.21.1812181448170.12686@nanos.tec.linutronix.de> <62997df2-0817-b54d-b11e-00a567f1d67c@linux.intel.com>
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On Tue, 18 Dec 2018, Li, Aubrey wrote:

> On 2018/12/18 22:14, Thomas Gleixner wrote:
> > On Tue, 18 Dec 2018, Aubrey Li wrote:
> >> diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
> >> index a38bf5a1e37a..8778ac172255 100644
> >> --- a/arch/x86/include/asm/fpu/internal.h
> >> +++ b/arch/x86/include/asm/fpu/internal.h
> >> @@ -411,6 +411,13 @@ static inline int copy_fpregs_to_fpstate(struct fpu *fpu)
> >>  {
> >>  	if (likely(use_xsave())) {
> >>  		copy_xregs_to_kernel(&fpu->state.xsave);
> >> +
> >> +		/*
> >> +		 * AVX512 state is tracked here because its use is
> >> +		 * known to slow the max clock speed of the core.
> >> +		 */
> >> +		if (fpu->state.xsave.header.xfeatures & XFEATURE_MASK_AVX512)
> >> +			fpu->avx512_timestamp = jiffies_64;
> > 
> > Even if unlikely this is incorrect when running a 32 bit kernel because
> > there jiffies_64 cannot be atomically loaded vs. a concurrent update. See
> > the comment in include/linux/jiffies.h right above the jiffies_64
> > declaration.
> > 
> Yeah, I noticed this, because this is under use_xsave() condition, also need
> valid AVX512 state, so a 32 bit kernel won't enter this branch.

What exactly prevents a 32bit kernel from having the AVX512 feature bit
set? And if it cannot be set on 32bit, then why are you compiling that code
in at all?

Thanks,

	tglx