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[209.132.180.67]) by mx.google.com with ESMTP id f4si11734807pgg.492.2018.12.18.08.29.17; Tue, 18 Dec 2018 08:29:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727128AbeLRQ2P (ORCPT + 99 others); Tue, 18 Dec 2018 11:28:15 -0500 Received: from mga03.intel.com ([134.134.136.65]:25946 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726611AbeLRQ2O (ORCPT ); Tue, 18 Dec 2018 11:28:14 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Dec 2018 08:28:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,368,1539673200"; d="scan'208";a="119825143" Received: from cli6-desk1.ccr.corp.intel.com (HELO [10.239.161.118]) ([10.239.161.118]) by orsmga001.jf.intel.com with ESMTP; 18 Dec 2018 08:28:12 -0800 Subject: Re: [PATCH v6 1/3] x86/fpu: track AVX-512 usage of tasks To: Thomas Gleixner Cc: Aubrey Li , mingo@redhat.com, peterz@infradead.org, hpa@zytor.com, ak@linux.intel.com, tim.c.chen@linux.intel.com, dave.hansen@intel.com, arjan@linux.intel.com, linux-kernel@vger.kernel.org References: <20181218042218.8653-1-aubrey.li@intel.com> <62997df2-0817-b54d-b11e-00a567f1d67c@linux.intel.com> From: "Li, Aubrey" Message-ID: Date: Wed, 19 Dec 2018 00:28:11 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/12/18 23:32, Thomas Gleixner wrote: > On Tue, 18 Dec 2018, Li, Aubrey wrote: > >> On 2018/12/18 22:14, Thomas Gleixner wrote: >>> On Tue, 18 Dec 2018, Aubrey Li wrote: >>>> diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h >>>> index a38bf5a1e37a..8778ac172255 100644 >>>> --- a/arch/x86/include/asm/fpu/internal.h >>>> +++ b/arch/x86/include/asm/fpu/internal.h >>>> @@ -411,6 +411,13 @@ static inline int copy_fpregs_to_fpstate(struct fpu *fpu) >>>> { >>>> if (likely(use_xsave())) { >>>> copy_xregs_to_kernel(&fpu->state.xsave); >>>> + >>>> + /* >>>> + * AVX512 state is tracked here because its use is >>>> + * known to slow the max clock speed of the core. >>>> + */ >>>> + if (fpu->state.xsave.header.xfeatures & XFEATURE_MASK_AVX512) >>>> + fpu->avx512_timestamp = jiffies_64; >>> >>> Even if unlikely this is incorrect when running a 32 bit kernel because >>> there jiffies_64 cannot be atomically loaded vs. a concurrent update. See >>> the comment in include/linux/jiffies.h right above the jiffies_64 >>> declaration. >>> >> Yeah, I noticed this, because this is under use_xsave() condition, also need >> valid AVX512 state, so a 32 bit kernel won't enter this branch. > > What exactly prevents a 32bit kernel from having the AVX512 feature bit > set? And if it cannot be set on 32bit, then why are you compiling that code > in at all? > I misunderstood, you mean 32bit kernel, not 32bit machine. Theoretically 32bit kernel can use AVX512, but not sure if anyone use it like this. get_jiffies_64() includes jiffies_lock ops so not good in context switch. So I want to use raw jiffies_64 here. jiffies is a good candidate but it has wraparound overflow issue. Other time source are expensive here. Should I limit the code only running on 64bit kernel? Thanks, -Aubrey