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[209.132.180.67]) by mx.google.com with ESMTP id w2si3453909pgh.565.2018.12.18.18.26.13; Tue, 18 Dec 2018 18:26:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727405AbeLSCUn (ORCPT + 99 others); Tue, 18 Dec 2018 21:20:43 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:20752 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727356AbeLSCUn (ORCPT ); Tue, 18 Dec 2018 21:20:43 -0500 X-UUID: 4af08a4aa1af48018b94fedfee2a6329-20181219 X-UUID: 4af08a4aa1af48018b94fedfee2a6329-20181219 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 184522062; Wed, 19 Dec 2018 10:20:34 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 19 Dec 2018 10:20:29 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 19 Dec 2018 10:20:27 +0800 From: Long Cheng To: Vinod Koul , Rob Herring , Mark Rutland , Ryder Lee CC: Matthias Brugger , Dan Williams , Greg Kroah-Hartman , Jiri Slaby , Sean Wang , Sean Wang , , , , , , , , Yingjoe Chen , YT Shen , Long Cheng Subject: [PATCH v6 2/2] arm: dts: mt2712: add uart APDMA to device tree Date: Wed, 19 Dec 2018 10:20:22 +0800 Message-ID: <1545186022-3712-3-git-send-email-long.cheng@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1545186022-3712-1-git-send-email-long.cheng@mediatek.com> References: <1545186022-3712-1-git-send-email-long.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: DD45F8EA45A144C8E76A63B51C4388EF704808B66F68CADD1BD674C21D928C4E2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. add uart APDMA controller device node 2. add uart 0/1/2/3/4/5 DMA function Signed-off-by: Long Cheng --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 50 +++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 976d92a..be1a22a 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -300,6 +300,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 10 + &apdma 11>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -369,6 +372,38 @@ (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_HIGH)>; }; + apdma: dma-controller@11000400 { + compatible = "mediatek,mt2712-uart-dma", + "mediatek,mt6577-uart-dma"; + reg = <0 0x11000400 0 0x80>, + <0 0x11000480 0 0x80>, + <0 0x11000500 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>, + <0 0x11000680 0 0x80>, + <0 0x11000700 0 0x80>, + <0 0x11000780 0 0x80>, + <0 0x11000800 0 0x80>, + <0 0x11000880 0 0x80>, + <0 0x11000900 0 0x80>, + <0 0x11000980 0 0x80>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&pericfg CLK_PERI_AP_DMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; + auxadc: adc@11001000 { compatible = "mediatek,mt2712-auxadc"; reg = <0 0x11001000 0 0x1000>; @@ -385,6 +420,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 0 + &apdma 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -395,6 +433,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 2 + &apdma 3>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -405,6 +446,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 4 + &apdma 5>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -415,6 +459,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 6 + &apdma 7>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -629,6 +676,9 @@ interrupts = ; clocks = <&baud_clk>, <&sys_clk>; clock-names = "baud", "bus"; + dmas = <&apdma 8 + &apdma 9>; + dma-names = "tx", "rx"; status = "disabled"; }; -- 1.7.9.5