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Subject: Re: [PATCH v3 3/3] dt-bindings: msm/disp: Introduce interconnect
 bindings for MDSS on SDM845
To:     Sravanthi Kollukuduru <skolluku@codeaurora.org>,
        dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
        freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org, robdclark@gmail.com,
        seanpaul@chromium.org, sean@poorly.run
References: <20181122090653.3523-1-skolluku@codeaurora.org>
 <20181122090653.3523-4-skolluku@codeaurora.org>
From:   Georgi Djakov <georgi.djakov@linaro.org>
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Message-ID: <bce2abad-061f-e179-2d24-d6df7903db80@linaro.org>
Date:   Wed, 19 Dec 2018 16:43:33 +0200
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In-Reply-To: <20181122090653.3523-4-skolluku@codeaurora.org>
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Sender: linux-kernel-owner@vger.kernel.org
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Hi Sravanthi,

Thanks for the patch!

On 11/22/18 11:06, Sravanthi Kollukuduru wrote:
> Add interconnect properties such as interconnect provider specifier
> , the edge source and destination ports which are required by the
> interconnect API to configure interconnect path for MDSS.
> 
> Changes in v2:
> 	- none
> 
> Changes in v3:
> 	- Remove common property definitions (Rob Herring)
> 
> Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/display/msm/dpu.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dpu.txt b/Documentation/devicetree/bindings/display/msm/dpu.txt
> index ad2e8830324e..d75b4360a4be 100644
> --- a/Documentation/devicetree/bindings/display/msm/dpu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/dpu.txt
> @@ -28,6 +28,11 @@ Required properties:
>  - #address-cells: number of address cells for the MDSS children. Should be 1.
>  - #size-cells: Should be 1.
>  - ranges: parent bus address space is the same as the child bus address space.
> +- interconnects : interconnect path specifier for MDSS according to
> +  Documentation/devicetree/bindings/interconnect/interconnect.txt. Should be
> +  2 paths corresponding to 2 AXI ports.
> +- interconnect-names : MDSS will have 2 port names to differentiate between the
> +  2 interconnect paths defined with interconnect specifier.
>  
>  Optional properties:
>  - assigned-clocks: list of clock specifiers for clocks needing rate assignment
> @@ -86,6 +91,10 @@ Example:
>  		interrupt-controller;
>  		#interrupt-cells = <1>;
>  
> +		interconnects = <&qnoc 38 &qnoc 512>,
> +				<&qnoc 39 &qnoc 512>;

Please use string names instead of hard-coded integers.

	interconnects = <&rsc_hlos MASTER_MDP0 &rsc_hlos SLAVE_EBI1>,
			<&rsc_hlos MASTER_MDP1 &rsc_hlos SLAVE_EBI1>;

> +		interconnect-names = "port0", "port1";

We are trying to be more descriptive and include both the source and the
destination like: "mdp0-mem", "mdp1-mem"

> +
>  		iommus = <&apps_iommu 0>;
>  
>  		#address-cells = <2>;

Otherwise looks good.

Thanks,
Georgi