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From:   Ioana Ciocoi Radulescu <ruxandra.radulescu@nxp.com>
To:     "shawnguo@kernel.org" <shawnguo@kernel.org>
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Subject: [PATCH 1/2] arm64: dts: lx2160a: Add fsl-mc node
Thread-Topic: [PATCH 1/2] arm64: dts: lx2160a: Add fsl-mc node
Thread-Index: AQHUmIW6Vu2k4jOI+0ubj1oSsG+umg==
Date:   Thu, 20 Dec 2018 17:02:03 +0000
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Add the fsl-mc node in the LX2160A device tree.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 117 +++++++++++++++++++++=
++++
 1 file changed, 117 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/bo=
ot/dts/freescale/fsl-lx2160a.dtsi
index a79f5c1..2366fd6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -762,5 +762,122 @@
 				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
 			dma-coherent;
 		};
+
+		fsl_mc: fsl-mc@80c000000 {
+			compatible =3D "fsl,qoriq-mc";
+			reg =3D <0x00000008 0x0c000000 0 0x40>,
+			      <0x00000000 0x08340000 0 0x40000>;
+			msi-parent =3D <&its>;
+			/* iommu-map property is fixed up by u-boot */
+			iommu-map =3D <0 &smmu 0 0>;
+			dma-coherent;
+			#address-cells =3D <3>;
+			#size-cells =3D <1>;
+
+			/*
+			 * Region type 0x0 - MC portals
+			 * Region type 0x1 - QBMAN portals
+			 */
+			ranges =3D <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
+				  0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
+
+			/*
+			 * Define the maximum number of MACs present on the SoC.
+			 */
+			dpmacs {
+				#address-cells =3D <1>;
+				#size-cells =3D <0>;
+
+				dpmac1: dpmac@1 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x1>;
+				};
+
+				dpmac2: dpmac@2 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x2>;
+				};
+
+				dpmac3: dpmac@3 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x3>;
+				};
+
+				dpmac4: dpmac@4 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x4>;
+				};
+
+				dpmac5: dpmac@5 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x5>;
+				};
+
+				dpmac6: dpmac@6 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x6>;
+				};
+
+				dpmac7: dpmac@7 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x7>;
+				};
+
+				dpmac8: dpmac@8 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x8>;
+				};
+
+				dpmac9: dpmac@9 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x9>;
+				};
+
+				dpmac10: dpmac@a {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xa>;
+				};
+
+				dpmac11: dpmac@b {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xb>;
+				};
+
+				dpmac12: dpmac@c {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xc>;
+				};
+
+				dpmac13: dpmac@d {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xd>;
+				};
+
+				dpmac14: dpmac@e {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xe>;
+				};
+
+				dpmac15: dpmac@f {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0xf>;
+				};
+
+				dpmac16: dpmac@10 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x10>;
+				};
+
+				dpmac17: dpmac@11 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x11>;
+				};
+
+				dpmac18: dpmac@12 {
+					compatible =3D "fsl,qoriq-mc-dpmac";
+					reg =3D <0x12>;
+				};
+			};
+		};
 	};
 };
--=20
2.7.4