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[209.85.221.54]) by smtp.gmail.com with ESMTPSA id w31sm7092428edw.82.2018.12.21.08.54.59 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Dec 2018 08:54:59 -0800 (PST) Received: by mail-wr1-f54.google.com with SMTP id x10so5943952wrs.8 for ; Fri, 21 Dec 2018 08:54:59 -0800 (PST) X-Received: by 2002:a5d:5208:: with SMTP id j8mr3535599wrv.188.1545411299075; Fri, 21 Dec 2018 08:54:59 -0800 (PST) MIME-Version: 1.0 References: <20181221152110.17982-1-codekipper@gmail.com> <20181221152110.17982-5-codekipper@gmail.com> In-Reply-To: <20181221152110.17982-5-codekipper@gmail.com> From: Chen-Yu Tsai Date: Sat, 22 Dec 2018 00:54:48 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 4/9] ASoC: sun4i-i2s: Fix offset mask To: Code Kipper Cc: Maxime Ripard , linux-sunxi , linux-arm-kernel , Liam Girdwood , Mark Brown , linux-kernel , Linux-ALSA , "Andrea Venturi (pers)" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 21, 2018 at 11:21 PM wrote: > > From: Marcus Cooper > > Also add offset to RX channel select > > Signed-off-by: Marcus Cooper Commit log seems a bit lacking. You could probably explain how you found this, either when comparing datasheet macros, or some actual error manifested and you "heard" it. You could also state what the fixed outcome should be. Also please add a fixes tag. The RX channel select offset should be added as a separate patch, also with an explanation on how you found this missing, and a fixes tag. ChenYu > --- > sound/soc/sunxi/sun4i-i2s.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c > index adb988ae9ac5..93a484d7e228 100644 > --- a/sound/soc/sunxi/sun4i-i2s.c > +++ b/sound/soc/sunxi/sun4i-i2s.c > @@ -110,7 +110,7 @@ > > #define SUN8I_I2S_TX_CHAN_MAP_REG 0x44 > #define SUN8I_I2S_TX_CHAN_SEL_REG 0x34 > -#define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 11) > +#define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 12) > #define SUN8I_I2S_TX_CHAN_OFFSET(offset) (offset << 12) > #define SUN8I_I2S_TX_CHAN_EN_MASK GENMASK(11, 4) > #define SUN8I_I2S_TX_CHAN_EN(num_chan) (((1 << num_chan) - 1) << 4) > @@ -482,6 +482,10 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) > regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG, > SUN8I_I2S_TX_CHAN_OFFSET_MASK, > SUN8I_I2S_TX_CHAN_OFFSET(offset)); > + > + regmap_update_bits(i2s->regmap, SUN8I_I2S_RX_CHAN_SEL_REG, > + SUN8I_I2S_TX_CHAN_OFFSET_MASK, > + SUN8I_I2S_TX_CHAN_OFFSET(offset)); > } > > regmap_field_write(i2s->field_fmt_mode, val); > -- > 2.20.1 >