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[209.132.180.67]) by mx.google.com with ESMTP id z14si11649390pgz.180.2018.12.23.08.18.13; Sun, 23 Dec 2018 08:18:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=dKTb6uph; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392401AbeLVRWR (ORCPT + 99 others); Sat, 22 Dec 2018 12:22:17 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:33974 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391348AbeLVRWQ (ORCPT ); Sat, 22 Dec 2018 12:22:16 -0500 Received: by mail-pf1-f196.google.com with SMTP id h3so4066545pfg.1 for ; Sat, 22 Dec 2018 09:22:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=IoP9BZUUkX40ga4hEgLLURPEq+vTNeu97J4sJh8y7kY=; b=dKTb6uphuQC8KSPX6Ew7qCLEW73g6ftbMNcgv6piP0YVwX1t79CbJaH9cSI2fqQhsj gOULzzHGLgPIDH+0xB03aEe6/NJ2N40iSMoUCJ1XOrh/9KpbTZridhwlAxOtYgdnc9GW Je8pH+7/WBy4LU6L9Prr5a5ULdU/ZpSHOEpJyRYpsXth4VaQsHR3rwAMFs2z0/+ZAkOh gJItJytZoSas9atwaGcbHmSecUc7qaMNfr1zxnp0agUG5vslAZ0qYc+6qemrqMma7xCS nEA701Pz6OYg5sAporr8V3ggSEgmIWUZe/cHxjoxv+qO9BNEwYVFWVcIhQ9ZJcwF4ryM LlMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=IoP9BZUUkX40ga4hEgLLURPEq+vTNeu97J4sJh8y7kY=; b=baxnOJvwwfNVwkBXsYROaFuEmNgfA7P7BzUxXp/R+V/AlSxt+PDb1Jd4BKPbFzABSb 80/Zldi8ajlpCCAx3+b+EcLFJDASu2fsdAGm9IdEFeoLErkFH+M+CviYqVFExnW+r6xP 9BRNY9vEDAElEIE5G85Fd/QLs58RSKRcvbgASfOUiB/Qzyh49huiP84wDFQFB3JjBVRD CZ0Zt+IKTNnvqOdH9YthuAXZORqYEAarXeDsy1Fj3KwEXTpJrRCDpgqTf2OSwjbTMlEQ 7BcH9fCBplROd9gpzOSjet5bhJD+RaV80a4OSOp6Hf7Xf5j8figf3yERHV1iIQbH7SO6 JEPQ== X-Gm-Message-State: AJcUukeXscT7cn0kNYY47kOsME84tuFYe2vBcXR4novJH2Et2JL8HdrH Wr2KYIq7XZixzxjS+WWG6HRl0tQtjtM= X-Received: by 2002:a65:584e:: with SMTP id s14mr6360864pgr.142.1545489564373; Sat, 22 Dec 2018 06:39:24 -0800 (PST) Received: from nishad ([106.51.25.107]) by smtp.gmail.com with ESMTPSA id 202sm49692361pfy.87.2018.12.22.06.39.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 22 Dec 2018 06:39:23 -0800 (PST) Date: Sat, 22 Dec 2018 20:09:16 +0530 From: Nishad Kamdar To: Johan Hovold Cc: Greg Kroah-Hartman , Alex Elder , Rui Miguel Silva , greybus-dev@lists.linaro.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Nishad Kamdar Subject: Re: [PATCH v3 1/3] staging: greybus: gpio: switch GPIO portions to use GPIOLIB_IRQCHIP Message-ID: <20181222143914.GA15439@nishad> References: <20181218111034.GM20658@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181218111034.GM20658@localhost> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Dec 18, 2018 at 12:10:34PM +0100, Johan Hovold wrote: > On Thu, Nov 22, 2018 at 10:37:16PM +0530, Nishad Kamdar wrote: > > Convert the GPIO driver to use the GPIO irqchip library > > GPIOLIB_IRQCHIP instead of reimplementing the same. > > > > Signed-off-by: Nishad Kamdar > > --- > > Changes in v2: > > - Retained irq.h and irqdomain.h headers. > > - Dropped function gb_gpio_irqchip_add() and > > called gpiochip_irqchip_add() from probe(). > > - Referred https://lkml.kernel.org/r/1476054589-28422-1-git-send-email-linus.walleij@linaro.org. > > Thanks for the update, and sorry about the late review. This looks > mostly good now, except for a couple minor things pointed out below. > > You also included the conversion to gpiochip_get_data() (as Linus also > did in his patch) although that's really a separate change and should go > in its own patch. Please break that bit out in a follow-up patch. > > Also note that someone did a bunch random white space changes to this > file in the staging tree, so it will not apply cleanly any more. > > > --- > > drivers/staging/greybus/Kconfig | 1 + > > drivers/staging/greybus/gpio.c | 184 ++++---------------------------- > > 2 files changed, 24 insertions(+), 161 deletions(-) > > > > diff --git a/drivers/staging/greybus/Kconfig b/drivers/staging/greybus/Kconfig > > index ab096bcef98c..b571e4e8060b 100644 > > --- a/drivers/staging/greybus/Kconfig > > +++ b/drivers/staging/greybus/Kconfig > > @@ -148,6 +148,7 @@ if GREYBUS_BRIDGED_PHY > > config GREYBUS_GPIO > > tristate "Greybus GPIO Bridged PHY driver" > > depends on GPIOLIB > > + select GPIOLIB_IRQCHIP > > ---help--- > > Select this option if you have a device that follows the > > Greybus GPIO Bridged PHY Class specification. > > diff --git a/drivers/staging/greybus/gpio.c b/drivers/staging/greybus/gpio.c > > index b1d4698019a1..2ec54744171d 100644 > > --- a/drivers/staging/greybus/gpio.c > > +++ b/drivers/staging/greybus/gpio.c > > @@ -9,9 +9,9 @@ > > #include > > #include > > #include > > -#include > > #include > > #include > > +#include > > #include > > > > #include "greybus.h" > > @@ -39,15 +39,8 @@ struct gb_gpio_controller { > > > > struct gpio_chip chip; > > struct irq_chip irqc; > > Turns out struct gpio_chip will have an irqchip whenever > CONFIG_GPIOLIB_IRQCHIP is selected so you can drop this one too. > Ok, I'll do that. > > - struct irq_chip *irqchip; > > - struct irq_domain *irqdomain; > > - unsigned int irq_base; > > - irq_flow_handler_t irq_handler; > > - unsigned int irq_default_type; > > struct mutex irq_lock; > > }; > > -#define gpio_chip_to_gb_gpio_controller(chip) \ > > - container_of(chip, struct gb_gpio_controller, chip) > > #define irq_data_to_gpio_chip(d) (d->domain->host_data) > > > > static int gb_gpio_line_count_operation(struct gb_gpio_controller *ggc) > > @@ -276,7 +269,7 @@ static void _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc, > > static void gb_gpio_irq_mask(struct irq_data *d) > > { > > struct gpio_chip *chip = irq_data_to_gpio_chip(d); > > - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); > > + struct gb_gpio_controller *ggc = gpiochip_get_data(chip); > > So please split these changes into a separate patch as they are not > related to the irqchip changes. > > Oh, and don't forget to update the TODO file now that the conversion is > done. :) > Sure, I'll do that. Thanks for the review. regards, Nishad > Thanks, > Johan