Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp5323374imu; Wed, 26 Dec 2018 00:16:36 -0800 (PST) X-Google-Smtp-Source: ALg8bN4FCXTG6wFUaPh2U+bHrg5LxHyFJLGx5yrk+yF6nOjZD83moxGsaomhjQ59fPz4jdqdFZlm X-Received: by 2002:a17:902:9a41:: with SMTP id x1mr18776371plv.126.1545812196771; Wed, 26 Dec 2018 00:16:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545812196; cv=none; d=google.com; s=arc-20160816; b=UnPHVoOQZXMDeHtv1+lY7SIv8VQ/4bXW3Rpnq9xnaPrWiqTNQ7RtaA+SmkGnKDuspq fTyge0b7oN/v2f88sKjER3YodQE9TbQwAf4zUpcDQ2slNUmKoeqiTxPToFj2lXkFE+CK BXEjz6HXTQkctHMJlzAfq7LtIighzb9kiJy2FRiuuAiqi5mRMZnDE6kskwKfoiCvazrN 3GEnB1qw7qFhIbkjUUEdXkspRSIIh1M/ura27YQHEUowcW9weODkTU+acactvYz5Qzp9 5oNv/ukdFr3+GWszvNqI5vY9L0+dqfdyh3rI38pp3uo7YIWQHon5zvPDY9XrFPWue031 B6tA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=TcD6K7XRRo54JZC/KhpYyLoyaQkon/nF9xSXB+i1RJk=; b=t2IYfAwpsksL+YmdA5MDQJzOCo/r3LlwGSk8x2TEDaU44TW1pXDK27bG08oLnCA5Mg woe+BXzoyDDAPV81dDEmCkhhaMc7utf2hBDdoJEntAu2Rb+51myfpG+QTGhBZ87FFP2y MeFQIpVdwfPe5JyCQ8zynQ5mdtLFcy+jzL7liNb2MF9yf0+Yuu8DC5hBElHM35craRGX J0x2A1dt8RQprgnWNaBA0+YdiTbi2kYG7/sKKVZgeBD8fmUIk0e5JQnoucehQANUL2fs 8+1JnVDMJ6uFsQGh5mMuwhIjjevFMnr0+CixqKCKwrH6hXNP+dhVM+6J4QGuxAU097aO FXKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n13si32496422pgp.307.2018.12.26.00.16.21; Wed, 26 Dec 2018 00:16:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726733AbeLZINV (ORCPT + 99 others); Wed, 26 Dec 2018 03:13:21 -0500 Received: from mga11.intel.com ([192.55.52.93]:64132 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726351AbeLZIMn (ORCPT ); Wed, 26 Dec 2018 03:12:43 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:12:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="104759673" Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga008.jf.intel.com with ESMTP; 26 Dec 2018 00:12:41 -0800 From: Yang Weijiang To: pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Cc: Yang Weijiang , Zhang Yi Z Subject: [PATCH v1 3/8] kvm:vmx Enable loading CET state bit while guest CR4.CET is being set. Date: Wed, 26 Dec 2018 16:15:27 +0800 Message-Id: <20181226081532.30698-4-weijiang.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181226081532.30698-1-weijiang.yang@intel.com> References: <20181226081532.30698-1-weijiang.yang@intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This bit controls whether guest CET states will be loaded on guest entry. Signed-off-by: Zhang Yi Z Signed-off-by: Yang Weijiang --- arch/x86/kvm/vmx.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 7bbb8b26e901..25fa6bd2fb95 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1045,6 +1045,8 @@ struct vcpu_vmx { bool req_immediate_exit; + bool vcpu_cet_on; + /* Support for PML */ #define PML_ENTITY_NUM 512 struct page *pml_pg; @@ -5409,6 +5411,23 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) return 1; } + /* + * When CET.CR4 is being set, it means we're enabling CET for + * the guest, then enable loading CET state bit in entry control. + * Otherwise, clear loading CET bit to disable guest CET. + */ + if (cr4 & X86_CR4_CET) { + if (!to_vmx(vcpu)->vcpu_cet_on) { + vmcs_set_bits(VM_ENTRY_CONTROLS, + VM_ENTRY_LOAD_GUEST_CET_STATE); + to_vmx(vcpu)->vcpu_cet_on = 1; + } + } else if (to_vmx(vcpu)->vcpu_cet_on) { + vmcs_clear_bits(VM_ENTRY_CONTROLS, + VM_ENTRY_LOAD_GUEST_CET_STATE); + to_vmx(vcpu)->vcpu_cet_on = 0; + } + if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4)) return 1; -- 2.17.1