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[209.132.180.67]) by mx.google.com with ESMTP id p126si35221393pgp.529.2018.12.27.13.11.17; Thu, 27 Dec 2018 13:11:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728871AbeL0HfC (ORCPT + 99 others); Thu, 27 Dec 2018 02:35:02 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:54143 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728625AbeL0He6 (ORCPT ); Thu, 27 Dec 2018 02:34:58 -0500 X-UUID: e30c9c35426e45f794f99bde7381183f-20181227 X-UUID: e30c9c35426e45f794f99bde7381183f-20181227 Received: from mtkcas34.mediatek.inc [(172.27.4.250)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 692165439; Thu, 27 Dec 2018 15:34:47 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 27 Dec 2018 15:34:45 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 27 Dec 2018 15:34:45 +0800 From: To: Bin Liu , Rob Herring CC: Greg Kroah-Hartman , Mark Rutland , Matthias Brugger , Alan Stern , , , , , , , Min Guo Subject: [PATCH 1/4] dt-bindings: usb: musb: Add support for MediaTek musb controller Date: Thu, 27 Dec 2018 15:34:23 +0800 Message-ID: <1545896066-897-2-git-send-email-min.guo@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1545896066-897-1-git-send-email-min.guo@mediatek.com> References: <1545896066-897-1-git-send-email-min.guo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Min Guo This adds support for MediaTek musb controller in host, peripheral and otg mode Signed-off-by: Min Guo --- .../devicetree/bindings/usb/mediatek,musb.txt | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.txt diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.txt b/Documentation/devicetree/bindings/usb/mediatek,musb.txt new file mode 100644 index 0000000..e899c9b --- /dev/null +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.txt @@ -0,0 +1,49 @@ +MediaTek musb DRC/OTG controller +------------------------------------------- + +Required properties: + - compatible : should be "mediatek,-musb", + "mediatek,mtk-musb", soc-model is the name of SoC, such as + mt2701, when using "mediatek,mtk-musb" compatible string, you + need SoC specific ones in addition, one of: + - "mediatek,mt2701-musb" + - reg : specifies physical base address and size of + the registers + - interrupts : interrupt used by musb controller + - interrupt-names : must be "mc" + - phys : PHY specifier for the OTG phy + - phy-names : should be "usb2-phy" + - dr_mode : should be one of "host", "peripheral" or "otg", + refer to usb/generic.txt + - clocks : a list of phandle + clock-specifier pairs, one for + each entry in clock-names + - clock-names : must contain "main","mcu","univpll" + for clocks of controller + +Optional properties: + - extcon : external connector for VBUS and IDPIN changes detection, + needed when supports dual-role mode. + - vbus-supply : reference to the VBUS regulator, needed when supports + dual-role mode. + - power-domains : a phandle to USB power domain node to control USB's + MTCMOS + +Example: + +usb2: usb@11200000 { + compatible = "mediatek,mt2701-musb"; + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = ; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + phy-names = "usb2-phy"; + vbus-supply = <&usb_vbus>; + extcon = <&extcon_usb>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; +}; -- 1.9.1