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Subject: Re: [RFC v2 1/6] x86: introduce kernel restartable sequence
From:   Nadav Amit <nadav.amit@gmail.com>
In-Reply-To: <20190103224835.GG6118@tassilo.jf.intel.com>
Date:   Thu, 3 Jan 2019 14:52:43 -0800
Cc:     Ingo Molnar <mingo@redhat.com>, Andy Lutomirski <luto@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        Josh Poimboeuf <jpoimboe@redhat.com>,
        Edward Cree <ecree@solarflare.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        LKML <linux-kernel@vger.kernel.org>, X86 ML <x86@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Borislav Petkov <bp@alien8.de>,
        David Woodhouse <dwmw@amazon.co.uk>
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Message-Id: <28F28C02-1817-4A0A-B488-216FDF22169A@gmail.com>
References: <20181231072112.21051-1-namit@vmware.com>
 <20181231072112.21051-2-namit@vmware.com> <87va35e61a.fsf@linux.intel.com>
 <263A441C-F062-491F-9E95-F00FA2092A99@gmail.com>
 <20190103224835.GG6118@tassilo.jf.intel.com>
To:     Andi Kleen <ak@linux.intel.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

> On Jan 3, 2019, at 2:48 PM, Andi Kleen <ak@linux.intel.com> wrote:
>=20
>> Ok=E2=80=A6 I=E2=80=99ll try to think about another solution. Just =
note that this is just
>> used as a hint to avoid unnecessary lookups. (IOW, nothing will break =
if the
>> prefix is used.)
>=20
> Are you sure actually?=20
>=20
> The empty prefix could mean 8bit register accesses.
>=20
>>> You're doing the equivalent of patching a private system call
>>> into your own kernel without working with upstream, don't do that.
>>=20
>> I don=E2=80=99t understand this comment though. Can you please =
explain?
>=20
> Instruction encoding =3D system call ABI
> Upstream =3D CPU vendors
>=20
> Early in Linux's history, naive Linux distribution vendors patched in =
their own
> private system calls without waiting for upstream to define an ABI, =
which caused
> endless compatibility problems. These days this is very frowned upon.
>=20
>>> Better to find some other solution to do the restart.
>>> How about simply using a per cpu variable? That should be cheaper
>>> anyways.
>>=20
>> The problem is that the per-cpu variable needs to be updated after =
the call
>> is executed, when we are already not in the context of the =
=E2=80=9Cinjected=E2=80=9D code.
>> I can increase it before the call, and decrease it after return - but =
this
>> can create (in theory) long periods in which the code is =
=E2=80=9Cunpatchable=E2=80=9D,
>> increase the code size and slow performance.
>>=20
>> Anyhow, I=E2=80=99ll give more thought. Ideas are welcomed.
>=20
> Write the address of the instruction into the per cpu variable.

Thanks for the explanations. I don=E2=80=99t think it would work (e.g., =
IRQs). I can
avoid generalizing and just detect the "magic sequence=E2=80=9D of the =
code, but let
me give it some more thought.