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Peter Anvin" , "maintainer : X86 ARCHITECTURE" , Tony Luck , Vishal Verma , "open list : X86 ARCHITECTURE" Subject: Re: [PATCH 0/2] x86/mce/amd: apply missing quirks for family 15 models Message-ID: <20190107112430.GA28223@nazgul.tnic> References: <1546857399-2926-1-git-send-email-shirish.s@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1546857399-2926-1-git-send-email-shirish.s@amd.com> User-Agent: Mutt/1.6.0 (2016-04-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 07, 2019 at 10:37:07AM +0000, S, Shirish wrote: > This patch series applies to family 15 CPU's of AMD platforms, > so as to address a consistent warning of > "[Firmware Bug]: cpu 0, invalid threshold interrupt offset" > at every boot and upon completiong of successful S3 cycle, > due to a missing quirk, which was not extended to newer models > and also not applied in resume path. > > Shirish S (2): > x86/mce/amd: Extend "Disable error thresholding bank 4" to more models > x86/mce/amd: Ensure quirks are applied in resume path as well > > arch/x86/kernel/cpu/mce/amd.c | 34 ++++++++++++++++++++++++++++++++++ > arch/x86/kernel/cpu/mce/core.c | 2 +- > 2 files changed, 35 insertions(+), 1 deletion(-) > > -- You sent those once three days ago. Why are you sending them again? There's no changelog to explain what the difference is from the last submission so what's up? Also, I'd suggest you have more patience. And while you wait, you can take a look at https://www.kernel.org/doc/html/latest/process/submitting-patches.html to read up on all the modalities when sending patches. Thx. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --