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[209.132.180.67]) by mx.google.com with ESMTP id 2si17641996pla.156.2019.01.07.10.47.24; Mon, 07 Jan 2019 10:47:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730207AbfAGPmN (ORCPT + 99 others); Mon, 7 Jan 2019 10:42:13 -0500 Received: from mail.bootlin.com ([62.4.15.54]:42072 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727305AbfAGPmN (ORCPT ); Mon, 7 Jan 2019 10:42:13 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 3AF9D20797; Mon, 7 Jan 2019 16:42:11 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from windsurf (aaubervilliers-681-1-29-148.w90-88.abo.wanadoo.fr [90.88.149.148]) by mail.bootlin.com (Postfix) with ESMTPSA id D4B7D20714; Mon, 7 Jan 2019 16:42:10 +0100 (CET) Date: Mon, 7 Jan 2019 16:42:10 +0100 From: Thomas Petazzoni To: Michal Simek , Linus Walleij Cc: Nava kishore Manne , Josh Cartwright , "monstr@monstr.eu" , Peter Crosthwaite , Borsodi Petr , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Rob Herring , "linux-arm-kernel@lists.infradead.org" , Steffen Trumtrar , =?UTF-8?B?U8O2cmVu?= Brinkmann , Shubhrajyoti Datta Subject: Re: [PATCH 2/8] gpio: zynq: Wakeup gpio controller when it is used as IRQ controller Message-ID: <20190107164210.3ecf37e8@windsurf> In-Reply-To: <6da5fd79-fbc8-b613-954f-dcbe2ef8d6c5@xilinx.com> References: <72d3cd83bed792a23ab60cf9b6d51b618f5aa084.1502103715.git.michal.simek@xilinx.com> <6da5fd79-fbc8-b613-954f-dcbe2ef8d6c5@xilinx.com> Organization: Bootlin X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, I am reviving this old thread, because the proposed patch (almost) solves the problem I recently reported with the bad interaction of runtime PM with the Zynq GPIO driver (see https://www.spinics.net/lists/linux-gpio/msg35437.html). On Mon, 14 Aug 2017 16:33:09 +0200, Michal Simek wrote: > diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c > index 9568708a550b..a08a044fa4aa 100644 > --- a/drivers/gpio/gpiolib.c > +++ b/drivers/gpio/gpiolib.c > @@ -1647,14 +1647,22 @@ static void gpiochip_irq_unmap(struct irq_domain > *d, unsigned int irq) > static int gpiochip_irq_reqres(struct irq_data *d) > { > struct gpio_chip *chip = irq_data_get_irq_chip_data(d); > + int ret; > > if (!try_module_get(chip->gpiodev->owner)) > return -ENODEV; > > + ret = pm_runtime_get_sync(chip->parent); > + if (ret < 0) { > + module_put(chip->gpiodev->owner); > + return ret; > + } > + > if (gpiochip_lock_as_irq(chip, d->hwirq)) { > chip_err(chip, > "unable to lock HW IRQ %lu for IRQ\n", > d->hwirq); > + pm_runtime_put(chip->parent); > module_put(chip->gpiodev->owner); > return -EINVAL; > } > @@ -1666,6 +1674,7 @@ static void gpiochip_irq_relres(struct irq_data *d) > struct gpio_chip *chip = irq_data_get_irq_chip_data(d); > > gpiochip_unlock_as_irq(chip, d->hwirq); > + pm_runtime_put(chip->parent); > module_put(chip->gpiodev->owner); > } This patch almost solves the problem. It doesn't work as-is, because it assumes that runtime PM is used by all GPIO controllers, which is not the case. When runtime PM is not enabled, pm_runtime_get_sync() fails with -EACCES, and the whole gpiochip_irq_reqres() function aborts. The following patch works fine in my case (a MMC card detect signal is connected to a pin of a PCA GPIO expander over I2C, whose INT# pin is itself connected to a GPIO pin of the Zynq SoC). diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 20887c62fbb3..bd9a81fc8d56 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include "gpiolib.h" @@ -3540,12 +3541,23 @@ int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset) if (!try_module_get(chip->gpiodev->owner)) return -ENODEV; + if (pm_runtime_enabled(chip->parent)) { + ret = pm_runtime_get_sync(chip->parent); + if (ret < 0) { + module_put(chip->gpiodev->owner); + return ret; + } + } + ret = gpiochip_lock_as_irq(chip, offset); if (ret) { chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset); + if (pm_runtime_enabled(chip->parent)) + pm_runtime_put(chip->parent); module_put(chip->gpiodev->owner); return ret; } + return 0; } EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); @@ -3553,6 +3565,8 @@ EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset) { gpiochip_unlock_as_irq(chip, offset); + if (pm_runtime_enabled(chip->parent)) + pm_runtime_put(chip->parent); module_put(chip->gpiodev->owner); } EXPORT_SYMBOL_GPL(gpiochip_relres_irq); However, I must say that from a design perspective, I am not a big fan of this solution. Indeed for the normal GPIO ->request() and ->free() hooks, it is currently the GPIO driver itself that is responsible for runtime PM get/put, so it would be weird to have the runtime PM get/put for the IRQ request/free be done by the GPIO core. I believe that either the GPIO core should be in charge of the entire runtime PM interaction, or it should entirely be the responsibility of each GPIO controller driver. Having a mixed solution seems very confusing. Let me know which direction should be taken so that I can submit a proper patch to hopefully resolve this issue. Best regards, Thomas -- Thomas Petazzoni, CTO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com