Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp4258839imu; Mon, 7 Jan 2019 19:21:56 -0800 (PST) X-Google-Smtp-Source: ALg8bN7DAX4fULjqaa8FTXJmryizFufogWLW/sLC9JqucsrAj6vPD6WgX+OXcNd4gocKoRjT9MuL X-Received: by 2002:a62:8096:: with SMTP id j144mr99928pfd.140.1546917716371; Mon, 07 Jan 2019 19:21:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546917716; cv=none; d=google.com; s=arc-20160816; b=WEG0imkV9JheGewPI6xOy3g4FNI6Yvy72ZNA0DXlerBxDM+keyKu6pEdxSln46TJ8B d6es8zsq89UgVBytujfrB8Bjx2dQuU5i4sy9SOtZi7/7n7RebvgAX5BzQ9X9zyE4LXMY 5BTE3nVEL1bKoqjSGtEgmD687L7/muDstHBBgxYzL5LhWNlHw+MXr9JkAxRpSitLeaXw YzRUBUtOtQ5pZfaNtXr7PR/wG26hFeVKadMn7KfVl6CVGSiFbu/Viq6svFNREjK74WGA maz/mixYIaw6BQ94KqCCQyOFD9rHmsjImk4g67dwmxP6Asb8UpOkpQf+d4FNr8y4Tka1 y3KA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=SAnF0X3OC3NJQMA+2YIgb23T/bmSzt8VuNtbgjvPCxs=; b=QP2Wj1NabQpmvoiF0lj9Z97wFYowAZMTG6O7PI5QQnPG/wyGTIYhLXyyvZwKKA9T1K iKGOSYcHgTQ1qO4/j8sbp0UiXUjdaXYaaWFcMuwFwHYs5NGQRxW4r2zo68ahhxgsWVJg 5KvsWKu8B8Fe7ckgSDRr3C7o/YYP9QAypN0NFT6ZiqaP4hyNUDxntlWEJQGL6D1yHXzh yvVpG+mMIIHlY7aqAfJFzUQgwvw4FqNT/czdAOKfgQXOB3FVNzzWJWaOh8uNnR6mh9Xs zczYj141A9KDv4EyW8qZ+S7+tIDiJ+tN2VNCEZ9aEBOF/ctl64lE23AV5VVo9rThe+0C h+BA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t65si68343545pfd.246.2019.01.07.19.21.40; Mon, 07 Jan 2019 19:21:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727431AbfAHDO7 (ORCPT + 99 others); Mon, 7 Jan 2019 22:14:59 -0500 Received: from inva020.nxp.com ([92.121.34.13]:52128 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727147AbfAHDO7 (ORCPT ); Mon, 7 Jan 2019 22:14:59 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E103A1A04B0; Tue, 8 Jan 2019 04:14:56 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 717981A0218; Tue, 8 Jan 2019 04:14:45 +0100 (CET) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id BD54C402A9; Tue, 8 Jan 2019 11:14:31 +0800 (SGT) From: Xiaowei Bao To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, kstewart@linuxfoundation.org, cyrille.pitchen@free-electrons.com, pombredanne@nexb.com, shawn.lin@rock-chips.com, niklas.cassel@axis.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Cc: Xiaowei Bao Subject: [PATCHv4 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode Date: Tue, 8 Jan 2019 11:09:19 +0800 Message-Id: <20190108030922.24031-1-xiaowei.bao@nxp.com> X-Mailer: git-send-email 2.14.1 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the documentation for the Device Tree binding for the layerscape PCIe controller with EP mode. Signed-off-by: Xiaowei Bao --- v2: - Add the SoC specific compatibles. v3: - modify the commit message. v4: - no change. .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 9b2b8d6..e20ceaa 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -13,6 +13,7 @@ information. Required properties: - compatible: should contain the platform identifier such as: + RC mode: "fsl,ls1021a-pcie" "fsl,ls2080a-pcie", "fsl,ls2085a-pcie" "fsl,ls2088a-pcie" @@ -20,6 +21,8 @@ Required properties: "fsl,ls1046a-pcie" "fsl,ls1043a-pcie" "fsl,ls1012a-pcie" + EP mode: + "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- 1.7.1