Subject: Re: 2.6.1 dual xeon
From: Justin Cormack <justin@street-vision.com>
To: Alexander Nyberg <alexn@telia.com>
Cc: LKML <linux-kernel@vger.kernel.org>
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Date: 27 Jan 2004 17:41:35 +0000
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You can run irqbalance in one shot mode not continously. Check the
options.

On Tue, 2004-01-27 at 17:13, Alexander Nyberg wrote:
> On Tue, 2004-01-27 at 08:38, Sander wrote:
> > Wakko Warner wrote (ao):
> > > > > I recently aquired a dual xeon system. HT is enabled which shows
> > > > > up as 4 cpus. I noticed that all interrupts are on CPU0. Can
> > > > > anyone tell me why this is?
> > > > 
> > > > The APIC needs to be programmed to deliver interrupts to certain
> > > > processors.
> > > > 
> > > > In 2.6, this is done in user-space via a program called irqbalance:
> > > 
> > > Thanks, working great. (Debian by the way)
> > 
> > Ehm, IIRC the "all interrupts are on CPU0" is how it is supposed to work
> > with a 2.6 kernel? The interrupts should spread if you have _a_lot_ of
> > them. This gives better performance than spreading the interrupts. Did I
> > read this on the list, or am I completely wrong here?
> 
> Apparently it was way especially better performance wise to have
> interrupts that hit often (ethernet cards ie.) on the same cpu.
> 
> But I can't see a reason for not dividing the different interrupt on
> different cpu's and letting them stay put. Maybe if you keep all
> interrupts on the same cpu the cache on the other ones will not have to
> be flushed often, which would be a good thing.
> 
> How would it be to maybe remove all interrupts from a cpu (except
> between cpu's) and have a few cpu's merely working with data and one "in
> control". Bad idea I guess as I haven't seen any such work.
> 
> Alex
> 
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