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Jan 2019 13:21:30.6610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5027950b-a8d9-49c9-65ee-08d6756c3621 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6SPR01MB0037 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07. 01. 19 16:42, Thomas Petazzoni wrote: > Hello, > > I am reviving this old thread, because the proposed patch (almost) > solves the problem I recently reported with the bad interaction of > runtime PM with the Zynq GPIO driver (see > https://www.spinics.net/lists/linux-gpio/msg35437.html). > > On Mon, 14 Aug 2017 16:33:09 +0200, Michal Simek wrote: > >> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c >> index 9568708a550b..a08a044fa4aa 100644 >> --- a/drivers/gpio/gpiolib.c >> +++ b/drivers/gpio/gpiolib.c >> @@ -1647,14 +1647,22 @@ static void gpiochip_irq_unmap(struct irq_domain >> *d, unsigned int irq) >> static int gpiochip_irq_reqres(struct irq_data *d) >> { >> struct gpio_chip *chip = irq_data_get_irq_chip_data(d); >> + int ret; >> >> if (!try_module_get(chip->gpiodev->owner)) >> return -ENODEV; >> >> + ret = pm_runtime_get_sync(chip->parent); >> + if (ret < 0) { >> + module_put(chip->gpiodev->owner); >> + return ret; >> + } >> + >> if (gpiochip_lock_as_irq(chip, d->hwirq)) { >> chip_err(chip, >> "unable to lock HW IRQ %lu for IRQ\n", >> d->hwirq); >> + pm_runtime_put(chip->parent); >> module_put(chip->gpiodev->owner); >> return -EINVAL; >> } >> @@ -1666,6 +1674,7 @@ static void gpiochip_irq_relres(struct irq_data *d) >> struct gpio_chip *chip = irq_data_get_irq_chip_data(d); >> >> gpiochip_unlock_as_irq(chip, d->hwirq); >> + pm_runtime_put(chip->parent); >> module_put(chip->gpiodev->owner); >> } > > This patch almost solves the problem. It doesn't work as-is, because it > assumes that runtime PM is used by all GPIO controllers, which is not > the case. When runtime PM is not enabled, pm_runtime_get_sync() fails > with -EACCES, and the whole gpiochip_irq_reqres() function aborts. > > The following patch works fine in my case (a MMC card detect signal is > connected to a pin of a PCA GPIO expander over I2C, whose INT# pin is > itself connected to a GPIO pin of the Zynq SoC). > > diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c > index 20887c62fbb3..bd9a81fc8d56 100644 > --- a/drivers/gpio/gpiolib.c > +++ b/drivers/gpio/gpiolib.c > @@ -27,6 +27,7 @@ > #include > #include > #include > +#include > #include > > #include "gpiolib.h" > @@ -3540,12 +3541,23 @@ int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset) > if (!try_module_get(chip->gpiodev->owner)) > return -ENODEV; > > + if (pm_runtime_enabled(chip->parent)) { > + ret = pm_runtime_get_sync(chip->parent); > + if (ret < 0) { > + module_put(chip->gpiodev->owner); > + return ret; > + } > + } > + > ret = gpiochip_lock_as_irq(chip, offset); > if (ret) { > chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset); > + if (pm_runtime_enabled(chip->parent)) > + pm_runtime_put(chip->parent); > module_put(chip->gpiodev->owner); > return ret; > } > + > return 0; > } > EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); > @@ -3553,6 +3565,8 @@ EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); > void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset) > { > gpiochip_unlock_as_irq(chip, offset); > + if (pm_runtime_enabled(chip->parent)) > + pm_runtime_put(chip->parent); > module_put(chip->gpiodev->owner); > } > EXPORT_SYMBOL_GPL(gpiochip_relres_irq); > > However, I must say that from a design perspective, I am not a big fan > of this solution. Indeed for the normal GPIO ->request() and ->free() > hooks, it is currently the GPIO driver itself that is responsible for > runtime PM get/put, so it would be weird to have the runtime PM get/put > for the IRQ request/free be done by the GPIO core. > > I believe that either the GPIO core should be in charge of the entire > runtime PM interaction, or it should entirely be the responsibility of > each GPIO controller driver. Having a mixed solution seems very > confusing. > > Let me know which direction should be taken so that I can submit a > proper patch to hopefully resolve this issue. I think it is up to Linus to say which way he wants to go. We found that way which omap is using. In connection to this old patch. I think I have tested it later and wasn't able to replicate it that's why I stop keep track on this. Thanks, Michal