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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 9viRynvkIj2xInge3VLavbRvU2YuvMrpg1KR5djW7eV3A6GGoVQJkinQqMUxdDaGvc0sColR2WsBtv2YRaBcMUvYSLsURS9POGlK0KV7lg2khwETgqju+X0wsYRN7BCCCrQt4frDKeRB175OBGaI+P6G7SbZl2bkrMpArMI3Idl1LuOYtPYRML2v0laKEQ6fBzg4E2HZhLdCAXuiyPpbU1Ly9+NgFY7jQToVSYB3rZqsyDVwUtIm4Rn2jHK38bQuVoco8HVwIx8v8iNnGY2fb8gDda8r5DKjT5MolWEbD0d7mDIFfsKvYm1q4rr86Q8S spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e88f0aa7-1246-4599-2d1a-08d6763cacbf X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jan 2019 14:13:48.1834 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB5157 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, the enable of the axi clock return status is ignored, causing issues when the enable fails then we try to disable it. Therefore, it is better to check the return status and disable it only when enable succeeded. Also, remove the helper functions around clk_axi, since we can directly use the clk API function for enable/disable the clock. Those functions are already checking for NULL clk and returning 0 if that's the case. Signed-off-by: Robert Chiras Acked-by: Leonard Crestez --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 8 ++++---- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 32 +++++++++++++------------------- drivers/gpu/drm/mxsfb/mxsfb_drv.h | 3 --- 3 files changed, 17 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxs= fb_crtc.c index 8d1b6a6..b9437c7 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -411,7 +411,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) { dma_addr_t paddr; =20 - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); writel(0, mxsfb->base + LCDC_CTRL); mxsfb_crtc_mode_set_nofb(mxsfb); =20 @@ -428,7 +428,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) { mxsfb_disable_controller(mxsfb); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } =20 void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, @@ -456,9 +456,9 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private= *mxsfb, =20 paddr =3D mxsfb_get_fb_paddr(mxsfb); if (paddr) { - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } =20 if (!fb || !old_fb) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsf= b_drv.c index 135b8e1..5e18353 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -103,18 +103,6 @@ drm_pipe_to_mxsfb_drm_private(struct drm_simple_displa= y_pipe *pipe) return container_of(pipe, struct mxsfb_drm_private, pipe); } =20 -void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb) -{ - if (mxsfb->clk_axi) - clk_prepare_enable(mxsfb->clk_axi); -} - -void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb) -{ - if (mxsfb->clk_axi) - clk_disable_unprepare(mxsfb->clk_axi); -} - /** * mxsfb_atomic_helper_check - validate state object * @dev: DRM device @@ -237,25 +225,31 @@ static void mxsfb_pipe_update(struct drm_simple_displ= ay_pipe *pipe, static int mxsfb_pipe_enable_vblank(struct drm_simple_display_pipe *pipe) { struct mxsfb_drm_private *mxsfb =3D drm_pipe_to_mxsfb_drm_private(pipe); + int ret =3D 0; + + ret =3D clk_prepare_enable(mxsfb->clk_axi); + if (ret) + return ret; =20 /* Clear and enable VBLANK IRQ */ - mxsfb_enable_axi_clk(mxsfb); writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); =20 - return 0; + return ret; } =20 static void mxsfb_pipe_disable_vblank(struct drm_simple_display_pipe *pipe= ) { struct mxsfb_drm_private *mxsfb =3D drm_pipe_to_mxsfb_drm_private(pipe); =20 + if (clk_prepare_enable(mxsfb->clk_axi)) + return; + /* Disable and clear VBLANK IRQ */ - mxsfb_enable_axi_clk(mxsfb); writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); } =20 static struct drm_simple_display_pipe_funcs mxsfb_funcs =3D { @@ -440,7 +434,7 @@ static irqreturn_t mxsfb_irq_handler(int irq, void *dat= a) struct mxsfb_drm_private *mxsfb =3D drm->dev_private; u32 reg; =20 - mxsfb_enable_axi_clk(mxsfb); + clk_prepare_enable(mxsfb->clk_axi); =20 reg =3D readl(mxsfb->base + LCDC_CTRL1); =20 @@ -449,7 +443,7 @@ static irqreturn_t mxsfb_irq_handler(int irq, void *dat= a) =20 writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); =20 - mxsfb_disable_axi_clk(mxsfb); + clk_disable_unprepare(mxsfb->clk_axi); =20 return IRQ_HANDLED; } diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h b/drivers/gpu/drm/mxsfb/mxsf= b_drv.h index c15b4f9..ce98411 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h @@ -47,9 +47,6 @@ struct mxsfb_drm_private { int mxsfb_setup_crtc(struct drm_device *dev); int mxsfb_create_output(struct drm_device *dev); =20 -void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb); -void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb); - void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb); void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb); void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, --=20 2.7.4