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From:   Logan Gunthorpe <logang@deltatee.com>
To:     linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc:     Stephen Bates <sbates@raithlin.com>,
        Palmer Dabbelt <palmer@sifive.com>,
        Christoph Hellwig <hch@lst.de>,
        Logan Gunthorpe <logang@deltatee.com>
Date:   Wed,  9 Jan 2019 13:39:09 -0700
Message-Id: <20190109203911.7887-1-logang@deltatee.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: [PATCH v4 0/2] [PATCH v2 0/6] sparsemem support for RISC-V
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

This patchset implements sparsemem on RISC-V. The first couple patches
from the previous version have been merged into v4.20 and the ARM patches
have been sent separately to the ARM maintainers. These are the RISC-V
patches only.

This is the first small step in supporting P2P on RISC-V.

--

Changes in v4:
* Rebased onto v5.0-rc1
* Changed the SECTION_SIZE_BITS to 27, per Nick Kossifidis

Changes in v3 (only sent the common patches):
* Rebased on v4.20-rc1
* Minor fixups
* Collected Ack from Will Deacon

Changes in v2:

* Rebase on v4.19-rc8
* Move the STRUCT_PAGE_MAX_SHIFT define into a common header (near
  the definition of struct page). As suggested by Christoph.
* Clean up the unnecessary nid variable in the memblocks_present()
  function, per Christoph.
* Collected tags from Palmer and Catalin.

--

Logan Gunthorpe (2):
  sh: mm: make use of new memblocks_present() helper
  RISC-V: Implement sparsemem

 arch/riscv/Kconfig                 | 23 +++++++++++++++++++++++
 arch/riscv/include/asm/pgtable.h   | 21 +++++++++++++++++----
 arch/riscv/include/asm/sparsemem.h | 11 +++++++++++
 arch/riscv/kernel/setup.c          |  4 +++-
 arch/riscv/mm/init.c               |  8 ++++++++
 arch/sh/mm/init.c                  |  7 +------
 6 files changed, 63 insertions(+), 11 deletions(-)
 create mode 100644 arch/riscv/include/asm/sparsemem.h

--
2.19.0