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From:   "S, Shirish" <Shirish.S@amd.com>
To:     --cc=Borislav Petkov <bp@alien8.de>
CC:     Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>,
        "H . Peter Anvin" <hpa@zytor.com>,
        "maintainer : X86 ARCHITECTURE" <x86@kernel.org>,
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        Vishal Verma <vishal.l.verma@intel.com>,
        "open list : X86 ARCHITECTURE" <linux-kernel@vger.kernel.org>,
        "S, Shirish" <Shirish.S@amd.com>
Subject: [PATCH 0/3] x86/mce/amd: apply missing quirks to family 15 models
 (v2)
Thread-Topic: [PATCH 0/3] x86/mce/amd: apply missing quirks to family 15
 models (v2)
Thread-Index: AQHUqLm5gU321iY/xUSK4SSPvJlWyw==
Date:   Thu, 10 Jan 2019 07:54:33 +0000
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Below patch series applies to family 15 CPU's of AMD platform, to address a
consistent warning of:

 "[Firmware Bug]: cpu 0, invalid threshold interrupt offset ..."

at every boot and every resume, which is misguiding as the reason is not a
Firmware Bug but "MC4_MISC thresholding quirk" not being apporpriately appl=
ied.

Shirish S (3):
  x86/mce/amd: apply MC4_MISC thresholding to all models of family 15
  x86/mce/amd: carve out MC4_MISC thresholding quirk
  x86/mce/amd: apply MC4_MISC thresholding quirk in resume path

 arch/x86/include/asm/mce.h     |  1 +
 arch/x86/kernel/cpu/mce/amd.c  |  6 ++++
 arch/x86/kernel/cpu/mce/core.c | 65 +++++++++++++++++++++++---------------=
----
 3 files changed, 42 insertions(+), 30 deletions(-)

--=20
2.7.4