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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90c2f8fd-ffdb-4ed1-5a27-08d6778d3019 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Jan 2019 06:22:34.2925 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add i.MX7ULP system integration module (SIM) binding. Signed-off-by: Anson Huang --- .../bindings/arm/freescale/fsl,imx7ulp-sim.txt | 16 ++++++++++++= ++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx= 7ulp-sim.txt diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-si= m.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt new file mode 100644 index 0000000..7d0c7f0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt @@ -0,0 +1,16 @@ +Freescale i.MX7ULP System Integration Module +---------------------------------------------- +The system integration module (SIM) provides system control and chip confi= guration +registers. In this module, chip revision information is located in JTAG ID= register, +and a set of registers have been made available in DGO domain for SW use, = with the +objective to maintain its value between system resets. + +Required properties: +- compatible: Should be "fsl,imx7ulp-sim". +- reg: Specifies base physical address and size of the register sets. + +Example: +sim: sim@410a3000 { + compatible =3D "fsl,imx7ulp-sim", "syscon"; + reg =3D <0x410a3000 0x1000>; +}; --=20 2.7.4