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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 866d4191-bf4b-41a1-8de2-08d6778d38ba X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Jan 2019 06:22:50.5990 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org i.MX7ULP SoC revision info is inside the SIM mode's JTAG_ID register, add sim node to support SoC revision check. Signed-off-by: Anson Huang --- arch/arm/boot/dts/imx7ulp.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dts= i index b86daf7..fca6e50 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -347,4 +347,17 @@ gpio-ranges =3D <&iomuxc1 0 96 32>; }; }; + + m4aips1: bus@41080000 { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x41080000 0x80000>; + ranges; + + sim: sim@410a3000 { + compatible =3D "fsl,imx7ulp-sim", "syscon"; + reg =3D <0x410a3000 0x1000>; + }; + }; }; --=20 2.7.4