Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Ran Wang <ran.wang_1@nxp.com>
To:     Alan Stern <stern@rowland.harvard.edu>
CC:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/3] usb: ehci: fsl: Update register accessing for
 arm/arm64 platforms
Thread-Topic: [PATCH 2/3] usb: ehci: fsl: Update register accessing for
 arm/arm64 platforms
Thread-Index: AQHUpxgC6yBGLPIm9UWYEo0ogu0Vc6WljdKAgAC5jzCAAMZlAIAAz2UAgADHFwCAASdcEA==
Date:   Fri, 11 Jan 2019 09:10:57 +0000
Message-ID: <AM5PR0402MB2865711AB90A1FE18F00852CF1850@AM5PR0402MB2865.eurprd04.prod.outlook.com>
References: <AM5PR0402MB286596CEFCD502488F579FADF1840@AM5PR0402MB2865.eurprd04.prod.outlook.com>
 <Pine.LNX.4.44L0.1901101018160.1497-100000@iolanthe.rowland.org>
In-Reply-To: <Pine.LNX.4.44L0.1901101018160.1497-100000@iolanthe.rowland.org>
Accept-Language: en-US
Content-Language: en-US
received-spf: None (protection.outlook.com: nxp.com does not designate
 permitted sender hosts)
spamdiagnosticoutput: 1:99
spamdiagnosticmetadata: NSPM
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: 8921a204-777d-4d5b-b00f-08d677a4b2cf
X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Jan 2019 09:10:57.6690
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0402MB2723
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi Alan,

On Thursday, January 10, 2019, Alan wrote:
>=20
> On Thu, 10 Jan 2019, Ran Wang wrote:
>=20
> > Hi Alan,
> >
> > > -----Original Message-----
> > > From: Alan Stern <stern@rowland.harvard.edu>
> > > Sent: Wednesday, January 09, 2019 23:14
> > > To: Ran Wang <ran.wang_1@nxp.com>
> > > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>; linux-
> > > usb@vger.kernel.org; linux-kernel@vger.kernel.org
> > > Subject: RE: [PATCH 2/3] usb: ehci: fsl: Update register accessing
> > > for
> > > arm/arm64 platforms
> > >
> > > On Wed, 9 Jan 2019, Ran Wang wrote:
> > >
> > > > > Why do you change this writel() into iowrite32be() but leave
> > > > > other instances of writel() unchanged?  Was this a mistake?
> > > >
> > > > Yes, I didn't notice there are other writel() used in this file.
> > > > However, as I know, on both powerpc and arm SoC, EHCI FSL IP's
> > > > memory mapped register block is always Big-endian, so I'd like to
> > > > replace all
> > > > writel() with iowrite32be() in this file. Is it necessary?
> > > >
> > > > Or I just replace them with ehci_writel() and select
> > > CONFIG_USB_EHCI_BIG_ENDIAN_MMIO?
> > >
> > > That should work okay.  ehci_fsl_setup() sets ehci->big_endian_desc
> > > and
> > > ehci->big_endian_mmio according to the platform data, so you just
> > > ehci->have
> > > to make sure the platform data is initialized correctly.
> > >
> > OK, so I should not change writel() into iowrite32be() at that place
> > you mentioned, and still using iowrite32be()/ioread32be() to replace
> > clrsetbits_be32(), am I right?
>=20
> Actually, I think it would be good to use ehci_writel() and
> ehci_readl() everywhere except in fsl_ehci_drv_probe().
>=20
> But if you prefer to use iowrite32be() and ioread32be() instead, that's
> probably okay.  (However, it won't work if anyone ever produces a little-
> endian version of the IP.)

Got it, I'll verify with ehci_readl() then work out the v2 patch if pass.
Thanks for advice.

Regards,
Ran