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[209.132.180.67]) by mx.google.com with ESMTP id q140si71659025pfc.20.2019.01.11.13.00.06; Fri, 11 Jan 2019 13:00:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@alien8.de header.s=dkim header.b=aAqoAKQ5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=alien8.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387743AbfAKS3z (ORCPT + 99 others); Fri, 11 Jan 2019 13:29:55 -0500 Received: from mail.skyhub.de ([5.9.137.197]:58114 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729479AbfAKS3z (ORCPT ); Fri, 11 Jan 2019 13:29:55 -0500 Received: from zn.tnic (p200300EC2BCAC5004D300B3B2C1DD65E.dip0.t-ipconnect.de [IPv6:2003:ec:2bca:c500:4d30:b3b:2c1d:d65e]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id D89BA1EC00E5; Fri, 11 Jan 2019 19:29:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1547231393; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=M4kvsJBoIpQblbxqqZvWsHsb608huFCWoMTQeIOVn8g=; b=aAqoAKQ5VjX+7suC22kWCNvEZ6OA0IGkxczLnh2nNbA4dHd6gSL2S1X0I9yezDTwPjh83s fFy5/9S6jXVoqZp7Qnsvumj4UpnbzBDU4TIGf9HbHLSnaZ/QLz3jr7gwHISUYWqJT+TX3I 8uTyEkXekaochKwbfvh8t9uV+9dd/fI= Date: Fri, 11 Jan 2019 19:29:44 +0100 From: Borislav Petkov To: James Morse Cc: "Wiebe, Wladislav (Nokia - DE/Ulm)" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "mchehab+samsung@kernel.org" , "gregkh@linuxfoundation.org" , "davem@davemloft.net" , "akpm@linux-foundation.org" , "nicolas.ferre@microchip.com" , "arnd@arndb.de" , "linux-edac@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "mchehab@kernel.org" , "Sverdlin, Alexander (Nokia - DE/Ulm)" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 2/2] EDAC: add ARM Cortex A15 L2 internal asynchronous error detection driver Message-ID: <20190111182944.GA24304@zn.tnic> References: <20190108104204.GA14243@zn.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 11, 2019 at 06:11:04PM +0000, James Morse wrote: > After I sent this it occurred to me the core can't know about errors in the L3 > cache (if there is one) or the memory-controller. These may have edac/ras > abilities, but they are selected by the soc integrator, so could be per soc. > This goes against Boris's no-per-functional-unit edac drivers. If we had to pick > one out of that set, I think the memory-controller is most useful as DRAM is the > most likely to be affected by errors. We have similar "designs" already :) Memory controller driver drivers/edac/fsl_ddr_edac.c gets linked together with: mpc85xx_edac_mod-y := fsl_ddr_edac.o mpc85xx_edac.o obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.