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[209.132.180.67]) by mx.google.com with ESMTP id n8si375678plp.137.2019.01.11.14.57.43; Fri, 11 Jan 2019 14:57:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Jeq8tqy3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726494AbfAKWzy (ORCPT + 99 others); Fri, 11 Jan 2019 17:55:54 -0500 Received: from mail.kernel.org ([198.145.29.99]:56924 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725767AbfAKWzx (ORCPT ); Fri, 11 Jan 2019 17:55:53 -0500 Received: from localhost (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B754720878; Fri, 11 Jan 2019 22:55:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1547247352; bh=PB0VTIOgtTZrCNTtouZNVhY3Guv7LCYJnviGb0J8eqE=; h=Subject:In-Reply-To:References:Cc:To:From:Date:From; b=Jeq8tqy3iZaIrNp8iz8ByUzidAadBF8jbaKudspImNLgiIXDh+cFmR6eOEuYojZWB SfOKAu7jxteaeIrFCKmLxaiw3J77OSVigSWUgZ0tVy4MWie8OlJY2Ffv9+8xGCPXSx 8ZZSxlRlFZaVgR5GiR/YbyHGQelQqYPXty3XGXHw= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH 3/7] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs User-Agent: alot/0.8 In-Reply-To: <20190107184836.GG14960@codeaurora.org> References: <20181219221105.3004-1-ilina@codeaurora.org> <20181219221105.3004-4-ilina@codeaurora.org> <154533717951.79149.1309452983166815703@swboyd.mtv.corp.google.com> <20190107184836.GG14960@codeaurora.org> Cc: evgreen@chromium.org, marc.zyngier@arm.com, linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org To: Lina Iyer Message-ID: <154724735183.169631.5181161977573120432@swboyd.mtv.corp.google.com> From: Stephen Boyd Date: Fri, 11 Jan 2019 14:55:51 -0800 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Lina Iyer (2019-01-07 10:48:36) > On Thu, Dec 20 2018 at 13:19 -0700, Stephen Boyd wrote: > >Quoting Lina Iyer (2018-12-19 14:11:01) >=20 > >> +static const struct pdc_gpio_pin_data sdm845_gpio_data =3D { > >> + .size =3D ARRAY_SIZE(sdm845_gpio_pdc_map), > >> + .map =3D sdm845_gpio_pdc_map, > >> +}; > >> + > >> +const struct of_device_id pdc_gpio_match_table[] =3D { > >> + { .compatible =3D "qcom,845-pdc", .data =3D &sdm845_gpio_data = }, > > > >Why not qcom,sdm845-pdc? > > > The compatible matches the compatible specified in the PDC driver. Not > sure why the 'sdm' was left out at that time. Are you going to add sdm? >=20 > >> + { }, > >> +}; > > > >I wonder why we wouldn't just put this all into the qcom-pdc.c file at > >the bottom and then have that IRQCHIP_DECLARE() macros call small > >functions that pass the pdc to gpio mapping table to qcom_pdc_init() > >that takes a third argument? > > > We could. I feel we would be adding tables like this and it just > clutters up the driver file. May be in the future we could move to > target specific data file like the gpios, but that could be excessive > too. Thought this might be a compromise. I am open to change. Ok. The benefit to my approach is that we don't do the string match twice. We do it once and sacrifice a little code space to jump to the real init function with the data we want. We can then put those chip tables inside some #ifdef to save space and allow configurations to turn off everything in EXPERT mode but leave everything default enabled otherwise. >=20 > >I really hope that in the future all the gpios can be wakeup capable so > >that we don't need to have the table at all! > > > I doubt there are plans to support that in hardware. We should plan for > supporting tables like this for other chipsets based on the PDC > architecture. >=20 Uh oh. That's sad.