Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3235989imu; Sun, 13 Jan 2019 22:22:39 -0800 (PST) X-Google-Smtp-Source: ALg8bN61s1F0z6wLyplnWn7hfgOziNkbDolXAVEJndnG/wVfyHZARi98g8aDB+GDp+T13TSgdBgQ X-Received: by 2002:a17:902:b112:: with SMTP id q18mr24174043plr.255.1547446959068; Sun, 13 Jan 2019 22:22:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547446959; cv=none; d=google.com; s=arc-20160816; b=W4vVB1AXawyWcuhK+qjFJ1BiuUPlcU03nYdhTJQk44569yXeKkRncQ56lmFHcAcHa7 Rt3+Ch+YqkCDORD7sdErh6M++U0UMQiFsr+9URR5/VMZUGiLS+2oLM9p6D4SPet2aU6e OpiSb51b+RxSVUPrVhH2H8B6LBVObj04GzxF/srcM5iIXRfgMv5dTlhkN4PgE5Ro3kVB rYEiJrIyybv1BBgb395xif2Nz72LVapLfTsEBhwakkMb85/x9LVnt9T+K3+WkbTXmSpg y4c6zIn/BRNCwYw99UFJWf9SWPBawjA7Ww7LB/XIStAs8ezz7N6UJGCAef16x42LfUmi KyCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LMQi/0QF+h9SBcTmlB4qDEaA5Jpy/FqBa0rPljyyJFg=; b=vIlqYyTkWN7g6yk5G0lzf0t9uKmd5deXaZjtilwe4d5B+ZENPe8YIZLnXWi1rMdVfn IBBU65V9YsNbDt+/UINdmTeFXSNQw59ylG+nB1FJ2afc3KdRsJ3GQP79Hvj77KNRG9GT Fk9fEkWP9pQYzA9ovCcRH4Z3nihEC6ag5S0sIWqcWur5xr+7QfS7MKQuRNhnWhZa04Xy EEjyBdv/NW7OQdMauEC/Psr5zxdOF5a3RDklTQMcjTsz/94a8We4hhnyXySVE59Bm73S NumsH76STDSzSLDTnmnHPDV7XfTKRmfTPJEi9OAZCknc15DnOxzRoHos1wJol4JhUJUm D1Lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=VA5WL0iH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 97si80266775plm.312.2019.01.13.22.22.23; Sun, 13 Jan 2019 22:22:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=VA5WL0iH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726658AbfANGUu (ORCPT + 99 others); Mon, 14 Jan 2019 01:20:50 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:33186 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726067AbfANGUt (ORCPT ); Mon, 14 Jan 2019 01:20:49 -0500 Received: by mail-pg1-f195.google.com with SMTP id z11so9026979pgu.0; Sun, 13 Jan 2019 22:20:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LMQi/0QF+h9SBcTmlB4qDEaA5Jpy/FqBa0rPljyyJFg=; b=VA5WL0iHOM3R+NiTNUuRqwmu6J9tMpEtuyhv02l1PxIWPYyCCsLH948r0Js2yutNf0 o1AT9iBADyvZtFNQotrrlyBH5LDOhujbljYXfOXVA6HsJSRajVNDeV1uaN5sMGZgBaCX wAeopgJEuZiMz4rDzfhi2OhIUK+vsPEdwd0C0i85Rvw429tL0OhYvGjeS9a6Oa4ra/k1 BUEyE/aL5TiFLIRCK/dpOjo6VW7TWSfcaBH4QuKPmTZE9mApP/gS7P8knglAuQDKAunT qUqkmWBV7M0k7tOlSYcgzGDyf0td0l3OKq1Tbe5yooxhvIqP0XFCn+YUFG7ZVNisi7+P EM1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LMQi/0QF+h9SBcTmlB4qDEaA5Jpy/FqBa0rPljyyJFg=; b=oKcDjz/ERthFS0fitNaa6jqx2VqPvUw/6vGM7y25eiiqhL8LS/8Dh2et0u24dD9bwB NK1sSrl3ctsmIxIBpEP/QLS04Zjauy6ttiZVPX9GeO8ncrwzw+BxR/u1exCaDnWgAMIo E/Wn5B1upjt70si1249iiS22EcKD2GlkCm84mr9mC5AiYed2aI6L1EeucV+UFpBQG/ZN TFb1DcLM/D4/jmMDeFS1aJ0sABT1Ul+lJyXojxB3OGPT0IqzjFDBdaqIOezlKWcte9r/ ZLL88DCPWUpFAn0MZurm8BY1oZJKo2iZJ9Rs5zdMAjEGwv3We9qk02IYLeRMD194Z++H 5XNg== X-Gm-Message-State: AJcUukdqE3UFj7Xvi+k/znA2Lo56U73Lh/539gFGQNRERx/9ZfEZP9dP Z+0JKnQv5JmcG5J4bgNgL90= X-Received: by 2002:a62:184e:: with SMTP id 75mr23559461pfy.28.1547446848648; Sun, 13 Jan 2019 22:20:48 -0800 (PST) Received: from localhost.localdomain ([2001:268:c0a3:70f2:4411:7de2:8afe:823b]) by smtp.gmail.com with ESMTPSA id a18sm111692965pgj.30.2019.01.13.22.20.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Jan 2019 22:20:48 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, William Breathitt Gray Subject: [PATCH v8 6/8] gpio: ws16c48: Utilize for_each_set_clump8 macro Date: Mon, 14 Jan 2019 15:21:18 +0900 Message-Id: X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 72 +++++++++++-------------------------- 1 file changed, 20 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index 5cf3697bfb15..1d071a3d3e81 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned int offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; + for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { + port_addr = ws16c48gpio->base + offset / 8; + port_state = inb(port_addr) & gpio_mask; - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, chip->ngpio, port_state, offset); } return 0; @@ -203,39 +180,30 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int iomask; + unsigned int offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; + for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { + index = offset / 8; + port_addr = ws16c48gpio->base + index; /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + gpio_mask &= ~ws16c48gpio->io_state[index]; + bitmask = bitmap_get_value8(bits, chip->ngpio, offset) & + gpio_mask; raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); /* update output state data and set device gpio register */ - ws16c48gpio->out_state[port] &= ~iomask; - ws16c48gpio->out_state[port] |= bitmask; - outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); + ws16c48gpio->out_state[index] &= ~gpio_mask; + ws16c48gpio->out_state[index] |= bitmask; + outb(ws16c48gpio->out_state[index], port_addr); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.20.1