Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3571400imu; Mon, 14 Jan 2019 05:27:59 -0800 (PST) X-Google-Smtp-Source: ALg8bN5zloyARZJx+hsi+j2CxbLUKSLVbpQtU5CtHlq6PNiIG+lmTcyOXK/Ml61ES1oiBd8Y6uiG X-Received: by 2002:a63:9e19:: with SMTP id s25mr21876221pgd.203.1547472478954; Mon, 14 Jan 2019 05:27:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547472478; cv=none; d=google.com; s=arc-20160816; b=L8zV7jKL84KV4vlZDubTV42shtX3vqjS0/DO5lwJMt4deAYEZHdmgn0ZmWwZV9ko3j fGVHFBPD+pYH52qJp8zN+pGS/Ne3V0olLLGoD0Yp+vx/UnOPkChf9vfJLf1FUJ0gfSIP 5E4ujgxcebrM+hx/OwzVakjdjVB8PLhUgo/Gv84bKjYonJkpEnSASyHPHX5T5KY6OqOZ fhraU7RbBkqro+eDMHPSoHKmqXX20ehjMR9QKKzG+ahZGlSDVphnlQPMo1zQyQ+xRtHX If+tWvQpc6GPirxOtAM2JDA8lXTO8BYjodrxOX4cF2xZIZPpkFuhPUcwzOb/PR2JoqrU /u9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=fRCs1u9heVGXhJdOX/5kFPoouLrzDR4CIAvdI4U5mZU=; b=OoOn/lIYAGd2gWvlq54aZrRZ9xPnaEICXynL7j1MXjlqWOF0SMLFINxepakHhlaZuS KY4A7W+4eqCeGjcq0Qa7vuGHksaUvY5H/S3p6v7sIzdC8UcEIacLwc8/1enCbANnyLQQ HK21Cju4PxL059Jat8NG5AznfJgeHSoayjCV2zigluZ24K2vtfVRmq/6p91eo8pwSPDO V5ensOWNHT0D9Vn4ANU7swwqcYxHbXjKhtPUwYcwd51TEa0bSas5EEKm9nHRBFhuxpxL 3vmXcNHieSqI48uVGZmh6jCW5i0B+dDZdtKgb4r39ey6ato6H0tKBLDkBU9wQsJJvDlP uQUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SKjVgiWT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 44si360122plc.110.2019.01.14.05.27.43; Mon, 14 Jan 2019 05:27:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SKjVgiWT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726753AbfANN0J (ORCPT + 99 others); Mon, 14 Jan 2019 08:26:09 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:37304 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726545AbfANN0I (ORCPT ); Mon, 14 Jan 2019 08:26:08 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0EDPKb0098063; Mon, 14 Jan 2019 07:25:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547472320; bh=fRCs1u9heVGXhJdOX/5kFPoouLrzDR4CIAvdI4U5mZU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SKjVgiWTPNKi9M141DjVIVi13fIItZeEen+LkOkVdfDjQkP02nfm8hhqkQZjn3wK2 VCyMies27BaNrsspb2Zyo0mcEtja9auPdzatQncPhF94AA+Q9TLDWneohJsyY0a/3z 4oAcmYCfikqghDVcIDrptGXvMrBAHKN60m7qypRs= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0EDPKaf088730 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 14 Jan 2019 07:25:20 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 14 Jan 2019 07:25:19 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 14 Jan 2019 07:25:20 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0EDOoWR028516; Mon, 14 Jan 2019 07:25:15 -0600 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Rob Herring , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Jingoo Han , Bjorn Helgaas , Mark Rutland , Arnd Bergmann , Greg Kroah-Hartman , Murali Karicheri , Jesper Nilsson , , , , , , Subject: [PATCH 05/24] PCI: keystone: Use platform_get_resource_byname to get memory resources Date: Mon, 14 Jan 2019 18:54:05 +0530 Message-ID: <20190114132424.6445-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190114132424.6445-1-kishon@ti.com> References: <20190114132424.6445-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use platform_get_resource_byname() instead of platform_get_resource() which uses index to get memory resources. While at that get the memory resource defined specifically for configuration space instead of deriving the configuration space address from dbics address space. Since pci-keystone driver has never worked out of the box in mainline kernel, dt backward compatibility is ignored. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 3f917ffa9105..88766d4cb50c 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -44,7 +44,6 @@ #define CFG_TYPE1 BIT(24) #define OB_SIZE 0x030 -#define SPACE0_REMOTE_CFG_OFFSET 0x1000 #define OB_OFFSET_INDEX(n) (0x200 + (8 * (n))) #define OB_OFFSET_HI(n) (0x204 + (8 * (n))) #define OB_ENABLEN BIT(0) @@ -790,21 +789,19 @@ static int __init ks_pcie_add_pcie_port(struct keystone_pcie *ks_pcie, struct resource *res; int ret; - /* Index 0 is the config reg. space address */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbics"); pci->dbi_base = devm_pci_remap_cfg_resource(dev, res); if (IS_ERR(pci->dbi_base)) return PTR_ERR(pci->dbi_base); - /* - * We set these same and is used in pcie rd/wr_other_conf - * functions - */ - pp->va_cfg0_base = pci->dbi_base + SPACE0_REMOTE_CFG_OFFSET; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config"); + pp->va_cfg0_base = devm_pci_remap_cfg_resource(dev, res); + if (IS_ERR(pp->va_cfg0_base)) + return PTR_ERR(pp->va_cfg0_base); + pp->va_cfg1_base = pp->va_cfg0_base; - /* Index 1 is the application reg. space address */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "app"); ks_pcie->va_app_base = devm_ioremap_resource(dev, res); if (IS_ERR(ks_pcie->va_app_base)) return PTR_ERR(ks_pcie->va_app_base); -- 2.17.1