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Subject: Re: General protection fault in `switch_mm_irqs_off()`
To:     Thomas Lendacky <Thomas.Lendacky@amd.com>,
        Borislav Petkov <bp@alien8.de>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Jiri Kosina <jikos@kernel.org>,
        "x86@kernel.org" <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Tim Chen <tim.c.chen@linux.intel.com>
References: <alpine.LRH.2.00.1901041737290.28043@gjva.wvxbf.pm>
 <cb7ba667-562b-1e4c-f16e-7c11804bc98a@molgen.mpg.de>
 <alpine.DEB.2.21.1901091410500.1755@nanos.tec.linutronix.de>
 <5c38f377-f088-5684-91a5-c2cc2d64dbbd@molgen.mpg.de>
 <ea49acb9-8165-80a3-e6fe-b29123ad5795@amd.com>
 <206f4322-c15e-6f0b-733d-fd19cd9c24a7@molgen.mpg.de>
 <98ed83c0-3077-848b-9de4-add70e9b417a@amd.com>
 <9bca3e26-1dfc-6e86-cf28-90cadd983ff4@molgen.mpg.de>
 <20190109211104.GG15665@zn.tnic>
 <9bbcbaa7-b164-fcef-0588-7c5f25aa2440@molgen.mpg.de>
 <20190110160054.GD17621@zn.tnic>
 <4de0b458-6028-3ab1-fef6-04c7fc440277@molgen.mpg.de>
 <3a35722f-969b-e720-1f3f-c60be7818ed1@amd.com>
 <8d6c854c-cbb9-adbf-345b-f04a40206573@amd.com>
From:   Paul Menzel <pmenzel@molgen.mpg.de>
Message-ID: <e45c8578-37e8-0aee-b235-d4d9bcedc8ee@molgen.mpg.de>
Date:   Mon, 14 Jan 2019 18:09:35 +0100
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Dear Thomas,


Thank you for checking this, and coming back with the results so quickly.=


On 01/14/19 18:00, Lendacky, Thomas wrote:
> On 1/10/19 12:34 PM, Lendacky, Thomas wrote:
>> On 1/10/19 10:49 AM, Paul Menzel wrote:
>>> Dear Boris, dear Thomas,
>>>
>>>
>>> On 01/10/19 17:00, Borislav Petkov wrote:
>>>> On Thu, Jan 10, 2019 at 02:57:40PM +0100, Paul Menzel wrote:
>>>>> Thank you very much. Indeed, the machine does not crash. I used Lin=
us=E2=80=99
>>>>> master branch for testing, and applied your patch on top. Please fi=
nd
>>>>> the full log attached.
>>>>
>>>>> 80.649: [    3.197107] Spectre V2 : spectre_v2_user_select_mitigati=
on: set X86_FEATURE_USE_IBPB
>>>>
>>>> This is amazing.
>>>>
>>>> Ok, next diff, same exercise. Thx.>=20
>>>> ---
>>>> diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include=
/asm/nospec-branch.h
>>>> index dad12b767ba0..528ef8336f5f 100644
>>>> --- a/arch/x86/include/asm/nospec-branch.h
>>>> +++ b/arch/x86/include/asm/nospec-branch.h
>>>> @@ -284,6 +284,12 @@ static inline void indirect_branch_prediction_b=
arrier(void)
>>>>  {
>>>>  	u64 val =3D PRED_CMD_IBPB;
>>>> =20
>>>> +	if (WARN_ON(boot_cpu_has(X86_FEATURE_USE_IBPB))) {
>>>> +		pr_info("%s: c: %px, array: 0x%x\n",
>>>> +			__func__, &boot_cpu_data, boot_cpu_data.x86_capability[7]);
>>>> +		return;
>>>> +	}
>>>> +
>>>>  	alternative_msr_write(MSR_IA32_PRED_CMD, val, X86_FEATURE_USE_IBPB=
);
>>>>  }
>>>> =20
>>>> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c=

>>>> index 8654b8b0c848..e818e5abe611 100644
>>>> --- a/arch/x86/kernel/cpu/bugs.c
>>>> +++ b/arch/x86/kernel/cpu/bugs.c
>>>> @@ -371,6 +371,9 @@ spectre_v2_user_select_mitigation(enum spectre_v=
2_mitigation_cmd v2_cmd)
>>>>  	if (boot_cpu_has(X86_FEATURE_IBPB)) {
>>>>  		setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
>>>> =20
>>>> +		pr_err("%s: set X86_FEATURE_USE_IBPB, c: %px, array: 0x%x\n",
>>>> +			__func__, &boot_cpu_data, boot_cpu_data.x86_capability[7]);
>>>> +
>>>>  		switch (cmd) {
>>>>  		case SPECTRE_V2_USER_CMD_FORCE:
>>>>  		case SPECTRE_V2_USER_CMD_PRCTL_IBPB:
>>>> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/comm=
on.c
>>>> index cb28e98a0659..8566737fa500 100644
>>>> --- a/arch/x86/kernel/cpu/common.c
>>>> +++ b/arch/x86/kernel/cpu/common.c
>>>> @@ -765,6 +765,9 @@ static void apply_forced_caps(struct cpuinfo_x86=
 *c)
>>>>  		c->x86_capability[i] &=3D ~cpu_caps_cleared[i];
>>>>  		c->x86_capability[i] |=3D cpu_caps_set[i];
>>>>  	}
>>>> +
>>>> +	if (c =3D=3D &boot_cpu_data)
>>>> +		pr_info("%s: c: %px, array: 0x%x\n", __func__, c, c->x86_capabili=
ty[7]);
>>>>  }
>>>> =20
>>>>  static void init_speculation_control(struct cpuinfo_x86 *c)
>>>> @@ -778,6 +781,10 @@ static void init_speculation_control(struct cpu=
info_x86 *c)
>>>>  	if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) {
>>>>  		set_cpu_cap(c, X86_FEATURE_IBRS);
>>>>  		set_cpu_cap(c, X86_FEATURE_IBPB);
>>>> +
>>>> +		pr_info("%s: X86_FEATURE_SPEC_CTRL: c: %px, array: 0x%x, CPUID: 0=
x%x\n",
>>>> +			__func__, c, c->x86_capability[7], cpuid_edx(7));
>>>> +
>>>>  		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
>>>>  	}
>>>> =20
>>>> @@ -793,9 +800,13 @@ static void init_speculation_control(struct cpu=
info_x86 *c)
>>>>  		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
>>>>  	}
>>>> =20
>>>> -	if (cpu_has(c, X86_FEATURE_AMD_IBPB))
>>>> +	if (cpu_has(c, X86_FEATURE_AMD_IBPB)) {
>>>>  		set_cpu_cap(c, X86_FEATURE_IBPB);
>>>> =20
>>>> +		pr_info("%s: X86_FEATURE_AMD_IBPB: c: %px, array: 0x%x, CPUID: 0x=
%x\n",
>>>> +			__func__, c, c->x86_capability[7], cpuid_ebx(0x80000008));
>>>> +	}
>>>> +
>>>>  	if (cpu_has(c, X86_FEATURE_AMD_STIBP)) {
>>>>  		set_cpu_cap(c, X86_FEATURE_STIBP);
>>>>  		set_cpu_cap(c, X86_FEATURE_MSR_SPEC_CTRL);
>>>
>>> Please find the logs attached.
>>
>> Ah, so the CPUID value is showing X86_FEATURE_AMD_IBPB (not sure why t=
he
>> cpuid command was showing a value of zero for EBX in your previous ema=
il).
>> Let me see what I can find out about this processor/firmware relation.=
 I
>> wouldn't expect to see the #GP given that the firmware says IBPB is
>> supported.
>=20
> I'm not able to reproduce this issue on my family 21, model 1, stepping=
 2
> processor (AMD Opteron(TM) Processor 6274) as I am able to successfully=

> write to the PRED_CMD MSR.

It=E2=80=99s not exactly the same processor, but I guess the same family =
should be
good enough. What board do you have? Do you have two sockets, and both
populated?

Here is an Asus KGPE-D16 with two AMD Opterons put in.

Lastly, my microcode updates are applied in firmware, and not by GNU/Linu=
x.

> Let's check the firmware file that you're loading. The one I'm using is=
:
>=20
> $ sha1sum /lib/firmware/amd-ucode/microcode_amd_fam15h.bin=20
> 90896256951d8edf7baf8181ae11e2dc618a5171  /lib/firmware/amd-ucode/micro=
code_amd_fam15h.bin
>=20
> Does that match what you have?

Yes, that matches exactly.

    90896256951d8edf7baf8181ae11e2dc618a5171  3rdparty/blobs/cpu/amd/fami=
ly_15h/microcode_amd_fam15h.bin


Kind regards,

Paul


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