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[209.85.221.43]) by smtp.gmail.com with ESMTPSA id n10sm4504351edq.33.2019.01.14.18.52.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Jan 2019 18:52:22 -0800 (PST) Received: by mail-wr1-f43.google.com with SMTP id 96so1270989wrb.2; Mon, 14 Jan 2019 18:52:21 -0800 (PST) X-Received: by 2002:adf:a1d2:: with SMTP id v18mr1028067wrv.87.1547520741332; Mon, 14 Jan 2019 18:52:21 -0800 (PST) MIME-Version: 1.0 References: <20190113021719.46457-1-samuel@sholland.org> <9738319a-4154-62be-2325-2873dfb326dc@linaro.org> In-Reply-To: <9738319a-4154-62be-2325-2873dfb326dc@linaro.org> From: Chen-Yu Tsai Date: Tue, 15 Jan 2019 10:52:08 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 0/2] Allwinner A64 timer workaround To: Daniel Lezcano Cc: Samuel Holland , Catalin Marinas , Will Deacon , Maxime Ripard , Rob Herring , Mark Rutland , Thomas Gleixner , Marc Zyngier , devicetree , linux-arm-kernel , linux-kernel , linux-sunxi Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 14, 2019 at 8:57 PM Daniel Lezcano wrote: > > On 13/01/2019 03:17, Samuel Holland wrote: > > This is the third version of a patch series to fix system clock jumps > > and other timer instability on the Allwinner A64 SoC. It has now been > > tested for a week, and I've received no reports of date jumps with this > > version. So this is, as far as I can tell, a complete workaround. > > > > See the commit messages for a detailed description of the issue, but the > > summary is that, when a high counter bit rolls over, indeterminance in > > the low bits causes CNTPCT/CNTVCT and their respective TVAL registers to > > jump forward or backward. Backward jumps (or the next read after forward > > jumps) are sometimes seen by the kernel and interpreted as the timer > > wrapping around after 2^56 cycles. This causes the system clock to jump > > forward approximately 91 years. > > > > changes since v2; > > - Reduced workaround threshold from 11 to 10 bits based on reports from > > other hardare and the U-Boot version of this workaround > > - Added TVAL handling based on Marc's suggestion > > - Added erratum documentation and renamed symbols to match > > - Added Maxime's Acked-by > > > > changes since v1: > > - Add an iteration limit like most other arch timer workarounds > > - Added Andre's Tested-by > > > > Samuel Holland (2): > > arm64: arch_timer: Workaround for Allwinner A64 timer instability > > arm64: dts: allwinner: a64: Enable A64 timer workaround > > > > Documentation/arm64/silicon-errata.txt | 2 + > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + > > drivers/clocksource/Kconfig | 10 ++++ > > drivers/clocksource/arm_arch_timer.c | 55 +++++++++++++++++++ > > 4 files changed, 68 insertions(+) > > > > Applied. Took the opportunity to add the stable@ tag. Not seeing it in tip just yet. Was it applied for -rc or -next? Need to know which branch to apply the device tree patch to. Thanks ChenYu