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Date:   Tue, 15 Jan 2019 16:55:16 +0100 (CET)
From:   Thomas Gleixner <tglx@linutronix.de>
To:     Cao jin <caoj.fnst@cn.fujitsu.com>
cc:     Ingo Molnar <mingo@redhat.com>, bp@alien8.de,
        "H. Peter Anvin" <hpa@zytor.com>, kirill.shutemov@linux.intel.com,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: question about head_64.S
In-Reply-To: <6aebbf86-2ba1-c517-dc47-054279daec49@cn.fujitsu.com>
Message-ID: <alpine.DEB.2.21.1901151641000.1561@nanos.tec.linutronix.de>
References: <6aebbf86-2ba1-c517-dc47-054279daec49@cn.fujitsu.com>
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On Tue, 15 Jan 2019, Cao jin wrote:

> Hi,
>   I have been digging into this file for a while, and I still have 2
> questions unclear, hope to get your help.
> 
> 1.
> At the entry of startup_64, we set all the data segment registers to 0,
> according to commit 08da5a2ca("x86_64: Early segment setup for VT"), it
> is said to accelerate the decompression under VT. I don't know Intel VT,
> but I did test under physical machine and virtual machine(with KVM, and
> intel VT enabled in BIOS) with following patch:
> 
> diff --git a/arch/x86/boot/compressed/head_64.S
> b/arch/x86/boot/compressed/head_64.S
> index 58f6a467f1fa..595f3c300173 100644
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -260,12 +260,12 @@ ENTRY(startup_64)
>          */
> 
>         /* Setup data segments. */
> -       xorl    %eax, %eax
> -       movl    %eax, %ds
> -       movl    %eax, %es
> -       movl    %eax, %ss
> -       movl    %eax, %fs
> -       movl    %eax, %gs
> +//     xorl    %eax, %eax
> +//     movl    %eax, %ds
> +//     movl    %eax, %es
> +//     movl    %eax, %ss
> +//     movl    %eax, %fs
> +//     movl    %eax, %gs
> 
> I don't see any obvious booting time difference, is there anything I missed?
> Also, I don't find explicit document saying we should zero these
> registers under VT.

The decompressor is position independent code, so all segments have to be
set to 0.

The patch you mentioned was just adding fs/gs to the list of segments
which are cleared and the commit message is not very clear. Though if you
dig further down then you find the original version of that patch:

  commit ffb6017563aa("[PATCH] x86-64: x86_64 - Fix FS/GS registers for VT execution")

That one has a proper explantaion.

Thanks,

	tglx