Subject: Re: question about PCI setup with multiple CPUs on the PCI bus(es)
From: Adrian Cox <adrian@humboldt.co.uk>
To: Chris Friesen <cfriesen@nortelnetworks.com>
Cc: linux-kernel@vger.kernel.org, mj@ucw.cz
In-Reply-To: <401941C4.4070502@nortelnetworks.com>
References: <401941C4.4070502@nortelnetworks.com>
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Date: Fri, 30 Jan 2004 14:27:10 +0000
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On Thu, 2004-01-29 at 17:24, Chris Friesen wrote:
> Surely we aren't the only people that want to put multiple CPUs on a 
> single PCI space.  How have people handled this in the past?  Ideally 
> what I'm looking for is a CONFIG_NO_MANGLE_PCI or something to that 
> effect. As a last resort we are considering hardcoding the bus/device 
> topology for the two drivers on special daughterboard, but this seems 
> really kludgy.
> 
> Anyone have any advice?

Having done this a few times before, the basic advice is to design with
a non-transparent bridge, such as an Intel 2155x or a PLX 6254/6540.
That's too late to save you, so you'll need a nasty hack instead.

Faced with your situation, I dealt with it by declaring one processor to
be the root of the PCI bus, and having a task on that processor read the
bus address of each PCI device, and pass those bus addresses to the
processors that needed them. Only the root processor ever made
configuration cycles.

- Adrian Cox
http://www.humboldt.co.uk/


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