Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1137527imu; Wed, 16 Jan 2019 13:26:00 -0800 (PST) X-Google-Smtp-Source: ALg8bN6eNVVMGpGAw2/isH2qUYFV73PfSQRcBj4YtPS93TvHD5KaBSJcbfW753kEXLu63Rw5H+LN X-Received: by 2002:a17:902:2a89:: with SMTP id j9mr12146250plb.296.1547673960275; Wed, 16 Jan 2019 13:26:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547673960; cv=none; d=google.com; s=arc-20160816; b=JY231ttWmq1gT53tdc0iDATc3f7XU47YRJr0wS144EJNS2o840oJwVSOtzx4D8o5jS xGg79wzP8YUg/raZd7BbfDv3x273VZP1j2ry+AZnW6SWqpgjbFWZ91tvHaeRsPpfKPWc +FgoMqHpoxe5qq1Kq0lEKXdtqlWKy/KY76LLsEyXElbCMjFVo4o1hZV2JxMjFDBnpGfM YCnYQ8YEMSJ8SjwJPQsjFTUEC21BW8mZNhOjOUfahkYlPWya+wyCzib0oipwkOCZksxz ycxGjdfB1Kry5EzUkMEUMNQbla0bYUU/2NpABSml3RgVT8lD7OGKp3ypwGBvDyIoF25U 4+1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=bTDsm6ZKFltRUaJBr8u8b4qC490eGbHx5PErlilDzgY=; b=YWGUgjvvtzlMeb0EN+T68FpqWkl0s6Bzu3IMGBDVIkVf9oHmLTbLXzO4o0RhsNIr2Q Vm/jlc8r65UVx/llzigUHLNvg6dQvPqdiwian1OPuqPvBLHMCJAo8CWMTXu3/Ir33keP VJU8UfGuYS/QZwVlTaANqJEUhwgReESl4sc/51NGOLzhhvgs5qe3ivD1g5nu19PVO1B7 hHWusslFi1QTtjkTV4SU5vcAe4Ql4iADLxyAjd4StkVzj7WTYluVcMFiMnAa3f1emaqf Da840yo6x4jNKk5vfyVsgT3joR5r4g09fKF7Z2FQxQon4eQO4fvJ6gfp8wsiFfLKcHzM SHbA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u13si7018672plq.268.2019.01.16.13.25.44; Wed, 16 Jan 2019 13:26:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403985AbfAPJ55 (ORCPT + 99 others); Wed, 16 Jan 2019 04:57:57 -0500 Received: from esa3.microchip.iphmx.com ([68.232.153.233]:49626 "EHLO esa3.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729085AbfAPJ5y (ORCPT ); Wed, 16 Jan 2019 04:57:54 -0500 X-IronPort-AV: E=Sophos;i="5.56,485,1539673200"; d="scan'208";a="25551578" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 16 Jan 2019 02:57:53 -0700 Received: from tenerife.corp.atmel.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.352.0; Wed, 16 Jan 2019 02:57:53 -0700 From: Nicolas Ferre To: Alexandre Belloni , Ludovic Desroches CC: , , Sebastian Reichel , , , "David S . Miller" , , Alan Stern , "Greg Kroah-Hartman" , Rob Herring , , Nicolas Ferre Subject: [PATCH 2/8] dt-bindings: arm: atmel: add new sam9x60 reset controller binding Date: Wed, 16 Jan 2019 10:57:38 +0100 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the Reset Controller's binding to add new SoC compatibility string. Signed-off-by: Nicolas Ferre --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 36952cc39993..badce6ef3ab3 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -22,6 +22,7 @@ Its subnodes can be: RSTC Reset Controller required properties: - compatible: Should be "atmel,-rstc". can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" + it also can be "microchip,sam9x60-rstc" - reg: Should contain registers location and length - clocks: phandle to input clock. -- 2.17.1