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[209.132.180.67]) by mx.google.com with ESMTP id n12si1250890pgb.563.2019.01.17.04.08.46; Thu, 17 Jan 2019 04:09:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@verge.net.au header.s=mail header.b=LSuNPn19; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727194AbfAQMBh (ORCPT + 99 others); Thu, 17 Jan 2019 07:01:37 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:60813 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726976AbfAQMBg (ORCPT ); Thu, 17 Jan 2019 07:01:36 -0500 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id D581025B760; Thu, 17 Jan 2019 23:01:30 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1547726491; bh=ruO83q8hxHJPFPBe8ARuOetb0LH4VO1rcbBXKkUkhoY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LSuNPn1936n1B55LUqi84bmAQWPc/piETE0uNpiB1thlPqDnf60WP/pcnedzMoWaC yfxiaqmXiVgvD4kx+ubhrML+85QR9tWK78FhjWE/UUbxRIuJvAwOeC5cZhxiSoWx37 mfCMuqIo21iIcNap/eWdAJyFbwX8YApdq9KW6ldk= Received: by reginn.horms.nl (Postfix, from userid 7100) id 45739940459; Thu, 17 Jan 2019 13:01:29 +0100 (CET) Date: Thu, 17 Jan 2019 13:01:29 +0100 From: Simon Horman To: Fabrizio Castro Cc: Rob Herring , Mark Rutland , Wolfgang Grandegger , Marc Kleine-Budde , Michael Turquette , Stephen Boyd , Magnus Damm , "David S. Miller" , Geert Uytterhoeven , Thierry Reding , Andreas =?utf-8?Q?F=C3=A4rber?= , Alexandre Belloni , Kevin Hilman , Johan Hovold , Lukasz Majewski , Michal Simek , Michal =?utf-8?B?Vm9rw6HEjQ==?= , Martin Blumenstingl , Ben Whitten , Chris Paterson , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-can@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das , linux-kernel@vger.kernel.org, ebiharaml@si-linux.co.jp Subject: Re: [PATCH 09/11] dt-bindings: can: rcar_can: Fix RZ/G2 CAN clocks Message-ID: <20190117120128.arjdug2mhqyuvq3k@verge.net.au> References: <1547663874-29411-1-git-send-email-fabrizio.castro@bp.renesas.com> <1547663874-29411-10-git-send-email-fabrizio.castro@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1547663874-29411-10-git-send-email-fabrizio.castro@bp.renesas.com> Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 16, 2019 at 06:37:52PM +0000, Fabrizio Castro wrote: > According to the latest information, the clock options for CAN on RZ/G2 > are the same as the ones available on R-Car Gen3 I'm taking your word for the above. As the patch matches the description: Reviewed-by: Simon Horman > Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support") > Signed-off-by: Fabrizio Castro > Reviewed-by: Chris Paterson > --- > Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt > index 7fcf501..b463e12 100644 > --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt > +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt > @@ -28,13 +28,8 @@ Required properties: > > - reg: physical base address and size of the R-Car CAN register map. > - interrupts: interrupt specifier for the sole interrupt. > -- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2 > - devices. > - phandles and clock specifiers for 3 CAN clock inputs for every other > - SoC. > -- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk". > - 3 clock input name strings for every other SoC: "clkp1", "clkp2", > - "can_clk". > +- clocks: phandles and clock specifiers for 3 CAN clock inputs. > +- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk". > - pinctrl-0: pin control group to be used for this controller. > - pinctrl-names: must be "default". > > @@ -50,8 +45,7 @@ using the below properties: > Optional properties: > - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: > <0x0> (default) : Peripheral clock (clkp1) > - <0x1> : Peripheral clock (clkp2) (not supported by > - RZ/G2 devices) > + <0x1> : Peripheral clock (clkp2) > <0x3> : External input clock > > Example > -- > 2.7.4 >