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[209.85.217.49]) by smtp.gmail.com with ESMTPSA id j95sm5380763uad.6.2019.01.17.15.37.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 Jan 2019 15:37:07 -0800 (PST) Received: by mail-vs1-f49.google.com with SMTP id n13so7376657vsk.4 for ; Thu, 17 Jan 2019 15:37:06 -0800 (PST) X-Received: by 2002:a67:da93:: with SMTP id w19mr6817525vsj.144.1547768226489; Thu, 17 Jan 2019 15:37:06 -0800 (PST) MIME-Version: 1.0 References: <20181219221105.3004-1-ilina@codeaurora.org> <20181219221105.3004-7-ilina@codeaurora.org> <20190107185218.GI14960@codeaurora.org> In-Reply-To: <20190107185218.GI14960@codeaurora.org> From: Doug Anderson Date: Thu, 17 Jan 2019 15:36:53 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 6/7] arm64: dts: msm: add PDC device bindings for sdm845 To: Lina Iyer Cc: Stephen Boyd , Evan Green , Marc Zyngier , LKML , Raju P L S S S N , linux-arm-msm , Thierry Reding , Bjorn Andersson Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Jan 7, 2019 at 10:52 AM Lina Iyer wrote: > >> + compatible = "qcom,sdm845-pdc"; > >> + reg = <0xb220000 0x30000>; > > > >nit: apparently common practice for Quaclomm dts is to pad the address > >in the "reg" field to all 8 digits. So the above should be: > > > >reg = <0x0b220000 0x30000>; > > > >NOTE: it's important to _not_ pad the unit address in the node name > >(so you got that right). Only update the "reg". For context: > > > Ok. > > Will take care of these in the next spin. This will now need to be adjusted to: reg = <0 0x0b220000 0 0x30000>; This fixes things up to deal with the patch ("arm64: dts: qcom: sdm845: Increase address and size cells for soc"), AKA: - https://patchwork.kernel.org/patch/10767511/ - https://lkml.kernel.org/r/20190117042940.25487-2-bjorn.andersson@linaro.org Thanks! -Doug