Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp2663840imu; Thu, 17 Jan 2019 19:28:16 -0800 (PST) X-Google-Smtp-Source: ALg8bN4vBXC2zHIwUepTGlNcUtTM9WDyg9ZsYNBeL8tZ6C4T7q7pyrvwp+sIQjz5xrC2NggLjwJ+ X-Received: by 2002:a17:902:7d90:: with SMTP id a16mr16905353plm.249.1547782096317; Thu, 17 Jan 2019 19:28:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547782096; cv=none; d=google.com; s=arc-20160816; b=GeiYFAmaJVlCVKjt9VpGUOGJ52jL006GxeZefviz5dHTMnH0PMrnXkEtVEpDV4qMxl 8tFEZPBUTn2BtnEJpefgM9V7HpIhAphO0xWiZKVyXYtV3wu40VKwwCHYHQWNsCZYv1qs X31pPFnUIBkkIFAFA4eYUx3S3FRWUjBvQoPkPPOazO0X4NTAhmyx5mfAduB4jUv0tXJ1 KbSm9f8c4aW3N+/txAhlqDGdxXRKylUyffM4yy7e0Gpy0Zwm4pDm03lroKeBp8ns30Nv VvQwFZunaSm3O/qZkavQ9LtvMFqEvhhY9w6czzU9SOtW/7Fmpz2Pxb1vISm19HbzUibG Ae0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=vaaOvn/4sbfSOgt39G3Cy/T6n7dSlBQCISTVuY4Zbpg=; b=yC3qhYmICoIB0o8GRKkVuOgAAqb4K0ZSdva+XbRM8JA+pnjhCyv6lgos9N/RiITN3m uZ19xPwC8VJENxUMq5PFYEdlqJ8Ugood/NewfQp0KCQksZaHrm7nzC5A2N1KRtUq+ijI fMGZOkX9vgWrTuFLas2qrelry0rxXjzfCw/nnV2EXCx8I4bmb5VFgUrXW9TTE3eScaL0 2jGu5fzC9PYLsmyz7RGHl0ky4kDcYI4SwJIIL5dHDGfUYqZUn3hjp/pNsSq7KKk+1TUm eVsnSPyQ98fy7Nd0s6BWVihpesmRRr2/LlARcms91X9Jl3STthCi6NWp5fAOdVtwZRev LJ9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 206si2874273pga.240.2019.01.17.19.27.57; Thu, 17 Jan 2019 19:28:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727154AbfARDZW (ORCPT + 99 others); Thu, 17 Jan 2019 22:25:22 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:60227 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726901AbfARDZE (ORCPT ); Thu, 17 Jan 2019 22:25:04 -0500 X-UUID: 323e7fb21c334698aafc428e2f9ef677-20190118 X-UUID: 323e7fb21c334698aafc428e2f9ef677-20190118 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1600500021; Fri, 18 Jan 2019 11:24:55 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 18 Jan 2019 11:24:47 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 18 Jan 2019 11:24:47 +0800 From: Ryder Lee To: Thierry Reding CC: Matthias Brugger , Sean Wang , Weijie Gao , , , , , , Ryder Lee Subject: [PATCH v1 1/5] pwm: mediatek: add a property "mediatek,num-pwms" Date: Fri, 18 Jan 2019 11:24:41 +0800 Message-ID: X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds a property "mediatek,num-pwms" to avoid having an endless list of compatibles with no differences for the same driver. Thus, the driver should have backwards compatibility to older DTs. Signed-off-by: Ryder Lee --- Changes since v1: add some checks for backwards compatibility. --- drivers/pwm/pwm-mediatek.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c index eb6674c..81b7e5e 100644 --- a/drivers/pwm/pwm-mediatek.c +++ b/drivers/pwm/pwm-mediatek.c @@ -55,7 +55,7 @@ enum { }; struct mtk_pwm_platform_data { - unsigned int num_pwms; + unsigned int num_pwms; /* it should not be used in the future SoCs */ bool pwm45_fixup; bool has_clks; }; @@ -226,27 +226,36 @@ static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) static int mtk_pwm_probe(struct platform_device *pdev) { - const struct mtk_pwm_platform_data *data; + struct device_node *np = pdev->dev.of_node; struct mtk_pwm_chip *pc; struct resource *res; - unsigned int i; + unsigned int i, num_pwms; int ret; pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); if (!pc) return -ENOMEM; - data = of_device_get_match_data(&pdev->dev); - if (data == NULL) - return -EINVAL; - pc->soc = data; + pc->soc = of_device_get_match_data(&pdev->dev); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pc->regs = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(pc->regs)) return PTR_ERR(pc->regs); - for (i = 0; i < data->num_pwms + 2 && pc->soc->has_clks; i++) { + /* Check if we have set 'num-pwms' in DTs. */ + ret = of_property_read_u32(np, "mediatek,num-pwms", &num_pwms); + if (ret < 0) { + /* If no, fallback to use SoC data for backwards compatibility. */ + if (pc->soc->num_pwms) { + num_pwms = pc->soc->num_pwms; + } else { + dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret); + return ret; + } + } + + for (i = 0; i < num_pwms + 2 && pc->soc->has_clks; i++) { pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]); if (IS_ERR(pc->clks[i])) { dev_err(&pdev->dev, "clock: %s fail: %ld\n", @@ -260,7 +269,7 @@ static int mtk_pwm_probe(struct platform_device *pdev) pc->chip.dev = &pdev->dev; pc->chip.ops = &mtk_pwm_ops; pc->chip.base = -1; - pc->chip.npwm = data->num_pwms; + pc->chip.npwm = num_pwms; ret = pwmchip_add(&pc->chip); if (ret < 0) { -- 1.9.1